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Searched refs:N (Results 1 – 25 of 198) sorted by relevance

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/arch/ia64/kernel/
Dmodule.c113 #define N(reloc) [R_IA64_##reloc] = #reloc macro
116 N(NONE), N(IMM14), N(IMM22), N(IMM64),
117 N(DIR32MSB), N(DIR32LSB), N(DIR64MSB), N(DIR64LSB),
118 N(GPREL22), N(GPREL64I), N(GPREL32MSB), N(GPREL32LSB),
119 N(GPREL64MSB), N(GPREL64LSB), N(LTOFF22), N(LTOFF64I),
120 N(PLTOFF22), N(PLTOFF64I), N(PLTOFF64MSB), N(PLTOFF64LSB),
121 N(FPTR64I), N(FPTR32MSB), N(FPTR32LSB), N(FPTR64MSB),
122 N(FPTR64LSB), N(PCREL60B), N(PCREL21B), N(PCREL21M),
123 N(PCREL21F), N(PCREL32MSB), N(PCREL32LSB), N(PCREL64MSB),
124 N(PCREL64LSB), N(LTOFF_FPTR22), N(LTOFF_FPTR64I), N(LTOFF_FPTR32MSB),
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/arch/x86/kvm/
Demulate.c4322 #define N D(NotImpl) macro
4350 N,
4352 N, N, N, N, N, N,
4358 N, N, N, N, N, N,
4362 N,
4364 N, N, N, N, N, N,
4379 N,
4381 N, N, N, N, N, N,
4396 I(DstMem | SrcNone | Mov | Stack | IncSP | TwoMemOp, em_pop), N, N, N, N, N, N, N,
4424 N, N, N, N, N, N,
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/arch/m68k/fpsp040/
Dstwotox.S29 | 3. Decompose X as X = N/64 + r where |r| <= 1/128. Furthermore
30 | decompose N as
31 | N = 64(M + M') + j, j = 0,1,2,...,63.
43 | N := round-to-int(y). Decompose N as
44 | N = 64(M + M') + j, j = 0,1,2,...,63.
232 fmovel %fp1,N(%a6) | ...N = ROUND-TO-INT(64 X)
235 fmovel N(%a6),%fp1 | ...N --> FLOATING FMT
236 movel N(%a6),%d0
241 asrl #6,%d2 | ...d2 IS L, N = 64L + J
335 fmovel %fp1,N(%a6) | ...N=INT(X*64*LOG10/LOG2)
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Dsetox.S79 | Step 2. Calculate N = round-to-nearest-int( X * 64/log2 ).
81 | 2.2 N := round-to-nearest-integer( X * 64/log2 ).
82 | 2.3 Calculate J = N mod 64; so J = 0,1,2,..., or 63.
83 | 2.4 Calculate M = (N - J)/64; so N = 64M + J.
89 | N := round-to-nearest-integer(Z)
103 | Step 3. Calculate X - N*log2/64.
104 | 3.1 R := X + N*L1, where L1 := single-precision(-log2/64).
105 | 3.2 R := R + N*L2, L2 := extended-precision(-log2/64 - L1).
108 | b) N*L1 is exact because N is no longer than 22 bits and
110 | c) The calculation X+N*L1 is also exact due to cancellation.
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Dssin.S34 | 3. Decompose X as X = N(Pi/2) + r where |r| <= Pi/4. Let
35 | k = N mod 4, so in particular, k = 0,1,2,or 3. Overwrite
59 | 2. Decompose X as X = N(Pi/2) + r where |r| <= Pi/4. Let
60 | k = N mod 4, so in particular, k = 0,1,2,or 3.
143 .set N,L_SCR2 define
205 lea PITBL+0x200,%a1 | ...TABLE OF N*PI/2, N = -32,...,32
209 fmovel %fp1,N(%a6) | ...CONVERT TO INTEGER
211 movel N(%a6),%d0
213 addal %d0,%a1 | ...A1 IS THE ADDRESS OF N*PIBY2
223 |--GET N+ADJN AND SEE IF SIN(R) OR COS(R) IS NEEDED
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/arch/mips/fw/arc/
Dfile.c16 ArcRead(ULONG FileID, VOID *Buffer, ULONG N, ULONG *Count) in ArcRead() argument
18 return ARC_CALL4(read, FileID, Buffer, N, Count); in ArcRead()
22 ArcWrite(ULONG FileID, PVOID Buffer, ULONG N, PULONG Count) in ArcWrite() argument
24 return ARC_CALL4(write, FileID, Buffer, N, Count); in ArcWrite()
/arch/ia64/lib/
Dmemcpy.S39 # define N (MEM_LAT + 4) macro
40 # define Nrot ((N + 7) & ~7)
75 mov ar.ec=N
94 .rotr val[N]
95 .rotp p[N]
103 (p[N-1])st8 [dst]=val[N-1],8
176 # undef N
178 # define N (MEM_LAT + 5) /* number of stages */ macro
179 # define Nrot ((N+1 + 2 + 7) & ~7) /* number of rotating regs */
229 mov ar.ec=N
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/arch/mips/include/asm/mach-au1x00/
Dau1000.h275 #define MEM_SDMODE_RS_N(N) ((N) << 18) argument
281 #define MEM_SDMODE_CS_N(N) ((N) << 15) argument
282 #define MEM_SDMODE_TRAS_N(N) ((N) << 11) argument
283 #define MEM_SDMODE_TMRD_N(N) ((N) << 9) argument
284 #define MEM_SDMODE_TWR_N(N) ((N) << 7) argument
285 #define MEM_SDMODE_TRP_N(N) ((N) << 5) argument
286 #define MEM_SDMODE_TRCD_N(N) ((N) << 3) argument
287 #define MEM_SDMODE_TCL_N(N) ((N) << 0) argument
293 #define MEM_SDADDR_CSBA_N(N) ((N) & (0x03FF << 22) >> 12) argument
294 #define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF << 22) >> 22) argument
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/arch/mips/include/asm/mips-boards/
Dbonito64.h351 #define BONITO_GPIO_IOW(N) (1<<(BONITO_GPIO_GPIOW_SHIFT+(N))) argument
352 #define BONITO_GPIO_IOR(N) (1<<(BONITO_GPIO_GPIOR_SHIFT+(N))) argument
353 #define BONITO_GPIO_INR(N) (1<<(BONITO_GPIO_GPINR_SHIFT+(N))) argument
372 #define BONITO_ICU_MBOX(N) (1<<(BONITO_ICU_MBOXES_SHIFT+(N))) argument
373 #define BONITO_ICU_GPIO(N) (1<<(BONITO_ICU_GPIOS_SHIFT+(N))) argument
374 #define BONITO_ICU_GPIN(N) (1<<(BONITO_ICU_GPINS_SHIFT+(N))) argument
/arch/arm/include/asm/
Dhw_breakpoint.h109 #define ARM_DBG_READ(N, M, OP2, VAL) do {\ argument
110 asm volatile("mrc p14, 0, %0, " #N "," #M ", " #OP2 : "=r" (VAL));\
113 #define ARM_DBG_WRITE(N, M, OP2, VAL) do {\ argument
114 asm volatile("mcr p14, 0, %0, " #N "," #M ", " #OP2 : : "r" (VAL));\
/arch/alpha/include/asm/
Dswitch_to.h9 #define switch_to(P,N,L) \ argument
11 (L) = alpha_switch_to(virt_to_phys(&task_thread_info(N)->pcb), (P)); \
Dcore_cia.h205 #define CIA_IOC_PCI_Wn_BASE(N) (IDENT_ADDR + 0x8760000400UL + (N)*0x100) argument
206 #define CIA_IOC_PCI_Wn_MASK(N) (IDENT_ADDR + 0x8760000440UL + (N)*0x100) argument
207 #define CIA_IOC_PCI_Tn_BASE(N) (IDENT_ADDR + 0x8760000480UL + (N)*0x100) argument
/arch/mips/include/asm/mach-loongson64/
Dloongson.h215 #define LOONGSON_ICU_MBOX(N) (1<<(LOONGSON_ICU_MBOXES_SHIFT+(N))) argument
216 #define LOONGSON_ICU_GPIO(N) (1<<(LOONGSON_ICU_GPIOS_SHIFT+(N))) argument
217 #define LOONGSON_ICU_GPIN(N) (1<<(LOONGSON_ICU_GPINS_SHIFT+(N))) argument
/arch/arm64/include/asm/
Dhw_breakpoint.h99 #define AARCH64_DBG_READ(N, REG, VAL) do {\ argument
100 VAL = read_sysreg(dbg##REG##N##_el1);\
103 #define AARCH64_DBG_WRITE(N, REG, VAL) do {\ argument
104 write_sysreg(VAL, dbg##REG##N##_el1);\
/arch/arm/boot/dts/
Dtegra124-apalis-eval.dts150 /* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
161 /* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */
171 /* EHCI instance 2: USB3_DP/N -> USBH4_DP/N */
230 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
241 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
Dtegra30-apalis-eval.dts140 /* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
151 /* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */
161 /* EHCI instance 2: USB3_DP/N -> USBH3_DP/N */
Dtegra124-apalis-v1.2-eval.dts152 /* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
163 /* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */
173 /* EHCI instance 2: USB3_DP/N -> USBH4_DP/N */
/arch/arm64/kvm/
DKconfig16 If you say N, all options in this submenu will be skipped and
46 If unsure, say N.
56 If unsure, say N.
67 say N.
69 If unsure, or not using protected nVHE (pKVM), say N.
/arch/openrisc/include/asm/
Dspr_defs.h108 #define SPR_DVR(N) (SPRGROUP_D + (N)) argument
109 #define SPR_DCR(N) (SPRGROUP_D + 8 + (N)) argument
118 #define SPR_PCCR(N) (SPRGROUP_PC + (N)) argument
119 #define SPR_PCMR(N) (SPRGROUP_PC + 8 + (N)) argument
/arch/sh/math-emu/
Dmath.c68 #define CMP_X(SZ,R,M,N) do{ \ argument
70 UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \
72 #define EQ_X(SZ,R,M,N) do{ \ argument
74 UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \
99 #define ARITH_X(SZ,OP,M,N) do{ \ argument
101 UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \
103 PACK_##SZ(N, Fr); }while(0)
285 #define EMU_FLOAT_X(SZ,N) do { \ in NOTYETn() argument
288 PACK_##SZ(N, Fn); }while(0) in NOTYETn()
301 #define EMU_FTRC_X(SZ,N) do { \ argument
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/arch/mips/include/asm/mach-loongson2ef/
Dloongson.h195 #define LOONGSON_ICU_MBOX(N) (1<<(LOONGSON_ICU_MBOXES_SHIFT+(N))) argument
196 #define LOONGSON_ICU_GPIO(N) (1<<(LOONGSON_ICU_GPIOS_SHIFT+(N))) argument
197 #define LOONGSON_ICU_GPIN(N) (1<<(LOONGSON_ICU_GPINS_SHIFT+(N))) argument
/arch/arm/mach-footbridge/
DKconfig17 Saying N will reduce the size of the Footbridge kernel.
27 Saying N will reduce the size of the Footbridge kernel.
41 Saying N will reduce the size of the Footbridge kernel.
57 Saying N will reduce the size of the Footbridge kernel.
/arch/nds32/
DKconfig.cpu19 If no FPU ISA is used in user space, say N.
43 say N to prevent performance loss.
56 If unsure, say N.
64 than page size, say Y. If it is using PIPT data cache, say N.
114 you have a reason not to or are unsure, say N.
120 you have a reason not to or are unsure, say N.
127 specifically require this or are unsure, say N.
145 configuration it is safe to say N, otherwise say Y.
154 Check exceptions. With an IP-only configuration it is safe to say N,
173 If unsure, say N.
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/arch/mips/boot/dts/cavium-octeon/
Ddlink_dsr-500n-1000n.dtsi3 * Device tree source for D-Link DSR-500N/1000N (common parts).
/arch/mips/sgi-ip27/
DKconfig11 in either N-Modes which allows for more nodes or M-Mode which allows
16 bool "IP27 N-Mode"
19 in either N-Modes which allows for more nodes or M-Mode which allows

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