Searched refs:REG1 (Results 1 – 11 of 11) sorted by relevance
/arch/sparc/include/asm/ |
D | tsb.h | 99 #define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \ argument 100 661: casa [TSB] ASI_N, REG1, REG2; \ 103 casa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \ 106 #define TSB_CAS_TAG(TSB, REG1, REG2) \ argument 107 661: casxa [TSB] ASI_N, REG1, REG2; \ 110 casxa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \ 120 #define TSB_LOCK_TAG(TSB, REG1, REG2) \ argument 121 99: TSB_LOAD_TAG_HIGH(TSB, REG1); \ 123 andcc REG1, REG2, %g0; \ 126 TSB_CAS_TAG_HIGH(TSB, REG1, REG2); \ [all …]
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D | trap_block.h | 184 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \ argument 185 lduh [THR + TI_CPU], REG1; \ 187 sllx REG1, TRAP_BLOCK_SZ_SHIFT, REG1; \ 189 add REG2, REG1, REG2; \ 213 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) argument
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/arch/arm64/boot/dts/rockchip/ |
D | rk3368-evb-act8846.dts | 54 vcc_ddr: REG1 {
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/arch/arm/boot/dts/ |
D | rk3288-evb-act8846.dts | 85 vcc_ddr: REG1 {
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D | rk3288-rock2-som.dtsi | 98 vcc_ddr: REG1 {
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D | rk3288-firefly-reload-core.dtsi | 112 vcc_ddr: REG1 {
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D | rk3188-radxarock.dts | 197 vcc_ddr: REG1 {
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D | rk3288-r89.dts | 179 vcc_ddr: REG1 {
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D | rk3288-miqi.dts | 188 vcc_ddr: REG1 {
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D | rk3288-firefly.dtsi | 263 vcc_ddr: REG1 {
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D | rk3188-bqedison2qc.dts | 317 vcc_ddr: REG1 {
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