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Searched refs:SYS_MVFR0_EL1 (Results 1 – 3 of 3) sorted by relevance

/arch/arm64/kvm/hyp/nvhe/
Dsys_regs.c381 AARCH32(SYS_MVFR0_EL1),
/arch/arm64/kernel/
Dcpufeature.c688 ARM64_FTR_REG(SYS_MVFR0_EL1, ftr_mvfr0),
992 init_cpu_ftr_reg(SYS_MVFR0_EL1, info->reg_mvfr0); in init_32bit_cpu_features()
1176 taint |= check_update_ftr_reg(SYS_MVFR0_EL1, cpu, in update_32bit_cpu_features()
1357 read_sysreg_case(SYS_MVFR0_EL1); in __read_sysreg_by_encoding()
2767 HWCAP_CAP(SYS_MVFR0_EL1, MVFR0_FPDP_SHIFT, 4, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFP),
2768 …HWCAP_CAP(SYS_MVFR0_EL1, MVFR0_FPDP_SHIFT, 4, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFPv…
/arch/arm64/include/asm/
Dsysreg.h185 #define SYS_MVFR0_EL1 sys_reg(3, 0, 0, 3, 0) macro