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/arch/x86/crypto/
Daesni-intel_avx-x86_64.S595 .macro CALC_AAD_HASH GHASH_MUL AAD AADLEN T1 T2 T3 T4 T5 T6 T7 T8
611 \GHASH_MUL \T8, \T2, \T1, \T3, \T4, \T5, \T6
629 movq (%r10), \T1
632 vpslldq $8, \T1, \T1
634 vpxor \T1, \T7, \T7
640 movq %rax, \T1
643 vpslldq $12, \T1, \T1
645 vpxor \T1, \T7, \T7
652 vmovdqu aad_shift_arr(%r11), \T1
653 vpshufb \T1, \T7, \T7
[all …]
Dnh-sse2-x86_64.S21 #define T1 %xmm9 macro
36 movdqu \offset(MESSAGE), T1
42 movdqa T1, T2
43 movdqa T1, T3
44 paddd T1, \k0 // reuse k0 to avoid a move
45 paddd \k1, T1
52 pshufd $0x10, T1, T5
53 pshufd $0x32, T1, T1
59 pmuludq T5, T1
63 paddq T1, PASS1_SUMS
[all …]
Dnh-avx2-x86_64.S25 #define T1 %ymm9 macro
43 vpaddd \k1, T3, T1
50 vpshufd $0x10, T1, T5
51 vpshufd $0x32, T1, T1
57 vpmuludq T5, T1, T1
61 vpaddq T1, PASS1_SUMS, PASS1_SUMS
143 vpunpckhqdq PASS1_SUMS, PASS0_SUMS, T1 // T1 = (0B 1B 0D 1D)
148 vinserti128 $0x1, T3_XMM, T1, T5 // T5 = (0B 1B 2B 3B)
150 vperm2i128 $0x31, T3, T1, T1 // T1 = (0D 1D 2D 3D)
153 vpaddq T1, T0, T0
Dsha512-avx2-asm.S94 T1 = %r12 # clobbers CTX2 define
187 rorx $34, a, T1 # T1 = a >> 34 # S0B
199 xor T1, y1 # y1 = (a>>39) ^ (a>>34) # S0
200 rorx $28, a, T1 # T1 = (a >> 28) # S0
203 xor T1, y1 # y1 = (a>>39) ^ (a>>34) ^ (a>>28) # S0
204 mov a, T1 # T1 = a # MAJB
205 and c, T1 # T1 = a&c # MAJB
208 or T1, y3 # y3 = MAJ = (a|c)&b)|(a&c) # MAJ
251 rorx $34, a, T1 # T1 = a >> 34 # S0B
263 xor T1, y1 # y1 = (a>>39) ^ (a>>34) # S0
[all …]
Dsha256-avx2-asm.S109 T1 = %r12d define
164 rorx $13, a, T1 # T1 = a >> 13 # S0B
178 xor T1, y1 # y1 = (a>>22) ^ (a>>13) # S0
179 rorx $2, a, T1 # T1 = (a >> 2) # S0
183 xor T1, y1 # y1 = (a>>22) ^ (a>>13) ^ (a>>2) # S0
184 mov a, T1 # T1 = a # MAJB
185 and c, T1 # T1 = a&c # MAJB
189 or T1, y3 # y3 = MAJ = (a|c)&b)|(a&c) # MAJ
214 rorx $13, a, T1 # T1 = a >> 13 # S0B
227 xor T1, y1 # y1 = (a>>22) ^ (a>>13) # S0
[all …]
Dghash-clmulni-intel_asm.S26 #define T1 %xmm2 macro
47 movaps DATA, T1
54 pclmulqdq $0x11, SHASH, T1 # T1 = a1 * b1
57 pxor T1, T2 # T2 = a0 * b1 + a1 * b0
63 pxor T2, T1 # <T1:DATA> is result of
77 pxor T3, T1
86 pxor T2, T1
87 pxor T1, DATA
Dpoly1305-x86_64-cryptogams.pl420 my ($H0,$H1,$H2,$H3,$H4, $T0,$T1,$T2,$T3,$T4, $D0,$D1,$D2,$D3,$D4, $MASK) =
888 vmovdqu 16*3($inp),$T1
892 vpsrldq \$6,$T1,$T3
893 vpunpckhqdq $T1,$T0,$T4 # 4
894 vpunpcklqdq $T1,$T0,$T0 # 0:1
898 vpsrlq \$26,$T0,$T1
901 vpand $MASK,$T1,$T1 # 1
981 vpmuludq $T1,$D4,$D1 # d1 = h1*r0
996 vpmuludq $T1,$H2,$H1 # h1*r1
1007 vpmuludq $T1,$H3,$H1 # h1*r2
[all …]
Dsha512-avx-asm.S61 T1 = %rcx define
123 mov f_64, T1 # T1 = f
125 xor g_64, T1 # T1 = f ^ g
127 and e_64, T1 # T1 = (f ^ g) & e
129 xor g_64, T1 # T1 = ((f ^ g) & e) ^ g = CH(e,f,g)
131 add WK_2(idx), T1 # W[t] + K[t] from message scheduler
135 add h_64, T1 # T1 = CH(e,f,g) + W[t] + K[t] + h
137 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)
146 add T1, d_64 # e(next_state) = d + T1
149 lea (T1, T2), h_64 # a(next_state) = T1 + Maj(a,b,c)
[all …]
Dsha512-ssse3-asm.S61 T1 = %rcx define
117 mov f_64, T1 # T1 = f
119 xor g_64, T1 # T1 = f ^ g
121 and e_64, T1 # T1 = (f ^ g) & e
123 xor g_64, T1 # T1 = ((f ^ g) & e) ^ g = CH(e,f,g)
125 add WK_2(idx), T1 # W[t] + K[t] from message scheduler
129 add h_64, T1 # T1 = CH(e,f,g) + W[t] + K[t] + h
131 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)
140 add T1, d_64 # e(next_state) = d + T1
143 lea (T1, T2), h_64 # a(next_state) = T1 + Maj(a,b,c)
[all …]
Dsha1_ssse3_asm.S196 .set T1, REG_T1 define
215 mov \c, T1
216 SWAP_REG_NAMES \c, T1
217 xor \d, T1
218 and \b, T1
219 xor \d, T1
223 mov \d, T1
224 SWAP_REG_NAMES \d, T1
225 xor \c, T1
226 xor \b, T1
[all …]
Daegis128-aesni-asm.S20 #define T1 %xmm7 macro
193 movdqu (%rdx), T1
197 pxor KEY, T1
198 movdqa T1, STATE0
210 aegis128_update; pxor T1, STATE3
212 aegis128_update; pxor T1, STATE1
214 aegis128_update; pxor T1, STATE4
216 aegis128_update; pxor T1, STATE2
218 aegis128_update; pxor T1, STATE0
388 movdqa \s2, T1
[all …]
Dsha1_avx2_x86_64_asm.S117 .set T1, REG_T1 define
360 andn D, TB, T1
362 xor T1, TB
385 andn C, A, T1 /* ~b&d */
398 xor T1, A /* F1 = (b&c) ^ (~b&d) */
431 mov B, T1
432 or A, T1
440 and C, T1
442 or T1, A
/arch/arm/crypto/
Dghash-ce-core.S15 T1 .req q1
162 vmull.p64 T1, XL_L, MASK
165 vext.8 T1, T1, T1, #8
167 veor T1, T1, XL
180 vshl.i64 T1, XL, #57
182 veor T1, T1, T2
184 veor T1, T1, T2
188 vshr.u64 T1, XL, #1
190 veor XL, XL, T1
191 vshr.u64 T1, T1, #6
[all …]
Dpoly1305-armv4.pl497 my ($T0,$T1,$MASK) = map("q$_",(15,4,0));
635 vshr.u64 $T1,$D0,#26
639 vadd.i64 $D1,$D1,$T1 @ h0 -> h1
644 vshr.u64 $T1,$D1,#26
646 vadd.i64 $D2,$D2,$T1 @ h1 -> h2
652 vshrn.u64 $T1#lo,$D2,#26
655 vadd.i32 $D3#lo,$D3#lo,$T1#lo @ h2 -> h3
660 vshr.u32 $T1#lo,$D3#lo,#26
663 vadd.i32 $D4#lo,$D4#lo,$T1#lo @ h3 -> h4
998 vshr.u64 $T1,$D0,#26
[all …]
Dsha256-armv4.pl53 $T1="r3"; $t3="r3";
292 my ($T0,$T1,$T2,$T3,$T4,$T5)=("q8","q9","q10","q11","d24","d25");
316 &vext_8 ($T1,@X[2],@X[3],4); # X[9..12]
323 &vadd_i32 (@X[0],@X[0],$T1); # X[0..3] += X[9..12]
326 &vshr_u32 ($T1,$T0,$sigma0[2]);
335 &veor ($T1,$T1,$T2);
344 &veor ($T1,$T1,$T3); # sigma0(X[1..4])
353 &vadd_i32 (@X[0],@X[0],$T1); # X[0..3] += sigma0(X[1..4])
485 vld1.32 {$T1},[$Ktbl,:128]!
498 vadd.i32 $T1,$T1,@X[1]
[all …]
Dnh-neon-core.S39 T1 .req q9
59 vadd.u32 T1, T3, \k1
114 vst1.8 {T0-T1}, [HASH]
Dsha512-armv4.pl507 my ($t0,$t1,$t2,$T1,$K,$Ch,$Maj)=map("d$_",(24..31)); # temps
533 vadd.i64 $T1,$Ch,$h
536 vadd.i64 $T1,$t2
543 vadd.i64 $T1,$K
546 vadd.i64 $d,$T1
547 vadd.i64 $Maj,$T1
/arch/arm64/crypto/
Dghash-ce-core.S13 T1 .req v2
151 trn2 T1.2d, SHASH.2d, HH.2d
152 eor SHASH2.16b, SHASH2.16b, T1.16b
155 trn2 T1.2d, HH3.2d, HH4.2d
156 eor HH34.16b, HH34.16b, T1.16b
174 movi T1.8b, #8
176 eor perm1.16b, perm1.16b, T1.16b
179 ushr T1.2d, perm1.2d, #24
182 sli T1.2d, perm1.2d, #40
188 tbl sh4.16b, {SHASH.16b}, T1.16b
[all …]
Dnh-neon-core.S26 T1 .req v9
44 add T1.4s, T3.4s, \k1\().4s
50 mov T5.d[0], T1.d[1]
54 umlal PASS1_SUMS.2d, T1.2s, T5.2s
100 addp T1.2d, PASS2_SUMS.2d, PASS3_SUMS.2d
101 st1 {T0.16b,T1.16b}, [HASH]
Dsha512-armv8.pl109 my ($T0,$T1,$T2)=(@X[($i-8)&15],@X[($i-9)&15],@X[($i-10)&15]);
164 ror $T1,@X[($j+1)&15],#$sigma0[0]
171 eor $T1,$T1,@X[($j+1)&15],ror#$sigma0[1]
179 eor $T1,$T1,@X[($j+1)&15],lsr#$sigma0[2] // sigma0(X[i+1])
188 add @X[$j],@X[$j],$T1
463 my ($T0,$T1,$T2,$T3,$T4,$T5,$T6,$T7) = map("q$_",(4..7,16..19));
495 &ushr_32 ($T1,$T0,$sigma0[2]);
505 &eor_8 ($T1,$T1,$T2);
514 &eor_8 ($T1,$T1,$T3); # sigma0(X[1..4])
526 &add_32 (@X[0],@X[0],$T1); # X[0..3] += sigma0(X[1..4])
[all …]
Dpoly1305-armv8.pl267 my ($T0,$T1,$MASK) = map("v$_",(29..31));
707 ushr $T1.2d,$ACC0,#26
711 add $ACC1,$ACC1,$T1.2d // h0 -> h1
715 ushr $T1.2d,$ACC1,#26
718 add $ACC2,$ACC2,$T1.2d // h1 -> h2
722 shrn $T1.2s,$ACC2,#26
726 add $H3,$H3,$T1.2s // h2 -> h3
731 ushr $T1.2s,$H3,#26
735 add $H4,$H4,$T1.2s // h3 -> h4
849 ushr $T1.2d,$ACC0,#26
[all …]
/arch/sparc/crypto/
Daes_asm.S7 #define ENCRYPT_TWO_ROUNDS(KEY_BASE, I0, I1, T0, T1) \ argument
9 AES_EROUND23(KEY_BASE + 2, I0, I1, T1) \
10 AES_EROUND01(KEY_BASE + 4, T0, T1, I0) \
11 AES_EROUND23(KEY_BASE + 6, T0, T1, I1)
13 #define ENCRYPT_TWO_ROUNDS_2(KEY_BASE, I0, I1, I2, I3, T0, T1, T2, T3) \ argument
15 AES_EROUND23(KEY_BASE + 2, I0, I1, T1) \
18 AES_EROUND01(KEY_BASE + 4, T0, T1, I0) \
19 AES_EROUND23(KEY_BASE + 6, T0, T1, I1) \
23 #define ENCRYPT_TWO_ROUNDS_LAST(KEY_BASE, I0, I1, T0, T1) \ argument
25 AES_EROUND23(KEY_BASE + 2, I0, I1, T1) \
[all …]
/arch/mips/crypto/
Dchacha-core.S29 #define T1 $s0 macro
132 lwl T1, (x*4)+MSB ## (IN); \
133 lwr T1, (x*4)+LSB ## (IN); \
140 xor X ## x, T1; \
149 lw T1, (x*4) ## (IN); \
156 xor X ## x, T1; \
328 addu T1, STATE, $at
334 lw SAVED_CA, 0(T1)
373 lbu T1, 0(IN)
377 xor T1, SAVED_X
[all …]
/arch/mips/mm/
Dpage.c45 #define T1 9 macro
480 build_copy_load(&buf, T1, off + copy_word_size); in build_copy_page()
488 build_copy_store(&buf, T1, off + copy_word_size); in build_copy_page()
502 build_copy_load(&buf, T1, off + copy_word_size); in build_copy_page()
510 build_copy_store(&buf, T1, off + copy_word_size); in build_copy_page()
527 build_copy_load(&buf, T1, off + copy_word_size); in build_copy_page()
533 build_copy_store(&buf, T1, off + copy_word_size); in build_copy_page()
545 build_copy_load(&buf, T1, off + copy_word_size); in build_copy_page()
551 build_copy_store(&buf, T1, off + copy_word_size); in build_copy_page()
569 build_copy_load(&buf, T1, off + copy_word_size); in build_copy_page()
[all …]
/arch/arm64/boot/dts/realtek/
Drtd1619-mjolnir.dts41 /* GPIO connector (T1) */

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