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Searched refs:__TLBI_VADDR (Results 1 – 4 of 4) sorted by relevance

/arch/arm64/include/asm/
Dtlbflush.h57 #define __TLBI_VADDR(addr, asid) \ macro
251 asid = __TLBI_VADDR(0, ASID(mm)); in flush_tlb_mm()
263 addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm)); in flush_tlb_page_nosync()
331 addr = __TLBI_VADDR(start, asid); in __flush_tlb_range()
383 start = __TLBI_VADDR(start, 0); in flush_tlb_kernel_range()
384 end = __TLBI_VADDR(end, 0); in flush_tlb_kernel_range()
399 unsigned long addr = __TLBI_VADDR(kaddr, 0); in __flush_tlb_kernel_pgtable()
/arch/arm64/kernel/
Dsys_compat.c40 __tlbi(aside1is, __TLBI_VADDR(0, 0)); in __do_compat_cache_op()
/arch/arm64/kvm/hyp/nvhe/
Dmm.c346 __tlbi_level(vale2is, __TLBI_VADDR(addr, 0), (KVM_PGTABLE_MAX_LEVELS - 1)); in fixmap_clear_slot()
/arch/arm64/kvm/hyp/
Dpgtable.c423 __tlbi_level(vae2is, __TLBI_VADDR(addr, 0), level); in hyp_unmap_walker()
430 __tlbi_level(vale2is, __TLBI_VADDR(addr, 0), level); in hyp_unmap_walker()