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Searched refs:adr (Results 1 – 25 of 100) sorted by relevance

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/arch/arm64/kernel/
Dreloc_test_syms.S21 adr x0, 0f
59 adr x0, sym64_rel
64 adr x1, 0f
72 adr x1, 0f
80 adr x1, 0f
Defi-entry.S39 adr x0, 0f
40 adr x1, 3f
/arch/powerpc/include/asm/
Dprocessor.h309 #define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr)) argument
312 extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr);
315 #define GET_ENDIAN(tsk, adr) get_endian((tsk), (adr)) argument
318 extern int get_endian(struct task_struct *tsk, unsigned long adr);
321 #define GET_UNALIGN_CTL(tsk, adr) get_unalign_ctl((tsk), (adr)) argument
324 extern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr);
/arch/mips/include/asm/txx9/
Dtx4927.h216 static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits) in txx9_clear64() argument
222 ____raw_writeq(____raw_readq(adr) & ~bits, adr); in txx9_clear64()
227 static inline void txx9_set64(__u64 __iomem *adr, __u64 bits) in txx9_set64() argument
233 ____raw_writeq(____raw_readq(adr) | bits, adr); in txx9_set64()
/arch/arm/mach-exynos/
Dsleep.S57 adr r0, _cp15_save_power
60 adr r0, _cp15_save_diag
67 adr r0, 1f
88 adr r0, 1f
Dheadsmp.S22 adr r4, 1f
/arch/arm/mach-omap2/
Dsleep33xx.S35 adr r3, am33xx_pm_ro_sram_data
66 adr r3, am33xx_pm_ro_sram_data
75 adr r9, am33xx_emif_sram_table
178 adr r9, am33xx_emif_sram_table
214 adr r9, am33xx_emif_sram_table
Dsleep43xx.S68 adr r3, am43xx_pm_ro_sram_data
119 adr r4, am43xx_pm_ro_sram_data
154 adr r3, am43xx_pm_ro_sram_data
168 adr r3, am43xx_pm_ro_sram_data
177 adr r9, am43xx_emif_sram_table
211 adr r3, am43xx_pm_ro_sram_data
327 adr r9, am43xx_emif_sram_table
361 adr r9, am43xx_emif_sram_table
383 adr r4, am43xx_pm_ro_sram_data
/arch/arm/mach-lpc32xx/
Dsuspend.S38 adr r0, tmp_stack_end
42 adr WORK1_REG, reg_bases
/arch/arm/mach-tegra/
Dsleep-tegra20.S61 adr \tmp, tegra_pll_state
207 adr r2, tegra20_sdram_pad_address
208 adr r4, tegra20_sdram_pad_save
229 adr r4, tegra20_sclk_save
370 adr r2, tegra20_sdram_pad_address
371 adr r3, tegra20_sdram_pad_safe
372 adr r4, tegra20_sdram_pad_save
392 adr r2, tegra20_sclk_save
/arch/arm/kernel/
Dhead-common.S83 adr r4, __mmap_switched_data
195 adr r0, str_lpae
207 adr r0, str_p1
211 adr r0, str_p2
Ddebug.S55 printhex: adr r2, hexbuf_rel
140 adr r1, hexbuf_rel
/arch/mips/include/asm/octeon/
Dcvmx-pow-defs.h87 uint64_t adr:1; member
89 uint64_t adr:1;
116 uint64_t adr:1; member
118 uint64_t adr:1;
176 uint64_t adr:1; member
178 uint64_t adr:1;
234 uint64_t adr:1; member
236 uint64_t adr:1;
259 uint64_t adr:1; member
261 uint64_t adr:1;
[all …]
Dcvmx-srxx-defs.h117 uint64_t adr:4; member
119 uint64_t adr:4;
/arch/arm/mach-rpc/
Dio-acorn.S26 adr r0, .Liosl_warning
/arch/arm/vdso/
Ddatapage.S11 adr r0, .L_vdso_data_ptr
/arch/x86/mm/
Dinit_32.c160 void **adr) in page_table_kmap_check() argument
179 newpte = *adr; in page_table_kmap_check()
182 *adr = (void *)(((unsigned long)(*adr)) + PAGE_SIZE); in page_table_kmap_check()
217 void *adr = NULL; in page_table_range_init() local
220 adr = alloc_low_pages(count); in page_table_range_init()
233 pmd, vaddr, pte, &adr); in page_table_range_init()
/arch/arm/mach-socfpga/
Dheadsmp.S22 adr r0, 1f
/arch/xtensa/include/asm/
Dpgtable.h396 #define _PGD_OFFSET(mm,adr,tmp) l32i mm, mm, MM_PGD; \
397 _PGD_INDEX(tmp, adr); \
400 #define _PTE_OFFSET(pmd,adr,tmp) _PTE_INDEX(tmp, adr); \
/arch/mips/boot/dts/cavium-octeon/
Docteon_3xxx.dtsi131 cavium,t-adr = <20>;
148 cavium,t-adr = <320>;
165 cavium,t-adr = <5>;
182 cavium,t-adr = <5>;
/arch/arm/common/
Dmcpm_head.S29 1901: adr r0, 1902b
33 adr r0, 1903b
37 adr r0, 1904b
71 adr r5, 3f
/arch/arm/plat-versatile/
Dheadsmp.S21 adr r4, 1f
/arch/arm/mach-spear/
Dheadsmp.S23 adr r4, 1f
/arch/arm/mach-imx/
Dheadsmp.S15 adr r0, diag_reg_offset
/arch/arm/boot/compressed/
Ddebug.S23 adr r1, 1f

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