| /arch/powerpc/include/asm/ |
| D | bitops.h | 38 #error only <linux/bitops.h> can be included directly
46 #define PPC_BITLSHIFT(be) (BITS_PER_LONG - 1 - (be)) argument
48 #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs)) argument
54 #define PPC_BITLSHIFT32(be) (32 - 1 - (be)) argument
56 #define PPC_BITMASK32(bs, be) ((PPC_BIT32(bs) - PPC_BIT32(be))|PPC_BIT32(bs)) argument
58 #define PPC_BITLSHIFT8(be) (8 - 1 - (be)) argument
60 #define PPC_BITMASK8(bs, be) ((PPC_BIT8(bs) - PPC_BIT8(be))|PPC_BIT8(bs)) argument
|
| /arch/sparc/lib/ |
| D | strncmp_32.S | 28 be 8f
32 be,a 1f
44 be 8f
48 be,a 1f
60 be 8f
64 be,a 1f
76 be 8f
80 be 1f
101 be 8f
105 be 7f
|
| D | memscan_64.S | 28 be,pt %icc, we_are_aligned
35 be,pn %xcc, szzero
65 be,pn %icc, 1f
69 be,pn %icc, 1f
74 be,pn %icc, 1f
78 be,pn %icc, 1f
82 be,a,pn %icc, 2f
86 be,pn %icc, 1f
91 be,pn %icc, 1f
95 be,pn %icc, 1f
[all …]
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| D | strlen.S | 20 BRANCH32(be, pt, 9f)
26 BRANCH32(be, pn, 4f)
32 BRANCH32(be, pt, 5f)
50 BRANCH32(be, pt, 8b)
56 BRANCH32(be, pn, 1f)
60 BRANCH32(be, pn, 1f)
64 BRANCH32(be, pn, 1f)
|
| D | memset.S | 92 be 2f
96 be 2f
118 be 2f
126 be 9f
137 be 13f
149 be 8f
152 be 1f
158 be 1f
170 be 13b
173 be 0f
[all …]
|
| D | memcpy.S | 107 be 4f
142 be 2f
152 be 3f
155 be 82f + 4
168 be 80f
190 be 81f
201 be 1f
209 be 1f
217 be 1f
238 be 84f
[all …]
|
| D | U3memcpy.S | 180 be,pn %XCC, end_return
200 be,pt %XCC, 2f
211 be,pt %icc, 2f
224 be,pt %icc, 3f
233 be,pn %icc, 3f
322 be,pt %XCC, 1f
341 be,pn %XCC, 2f
343 be,pn %XCC, 2f
347 be,a,pt %XCC, 1f
355 be,pn %XCC, 2f
[all …]
|
| D | locks.S | 26 be,a ___rw_read_enter
32 be,a ___rw_read_try
41 be,a ___rw_read_exit
47 be,a ___rw_write_enter
|
| D | checksum_32.S | 44 be 1f ! caller asks %o1 & 0x8
52 1: be 1f ! nope, skip this code
59 1: be 1f ! no trailing bytes, return
66 be 6f ! jmp if only hword remains
81 be 1f
95 1: be cpa
115 cpa: be 3f ! none to do
126 3: be cpte ! nope
223 be 1f
234 1: be 1f
[all …]
|
| D | memcmp.S | 15 1: BRANCH32(be, pn, 2f)
23 BRANCH32(be, pt, 1b)
|
| /arch/arm64/boot/dts/apple/ |
| D | t8103.dtsi | 28 cpu-release-addr = <0 0>; /* To be filled by loader */
36 cpu-release-addr = <0 0>; /* To be filled by loader */
44 cpu-release-addr = <0 0>; /* To be filled by loader */
52 cpu-release-addr = <0 0>; /* To be filled by loader */
60 cpu-release-addr = <0 0>; /* To be filled by loader */
68 cpu-release-addr = <0 0>; /* To be filled by loader */
76 cpu-release-addr = <0 0>; /* To be filled by loader */
84 cpu-release-addr = <0 0>; /* To be filled by loader */
121 * be a third selectable clock.
|
| D | t8103-j274.dts | 31 reg = <0 0 0 0>; /* To be filled by loader */
32 /* Format properties will be added by loader */
39 reg = <0x8 0 0x2 0>; /* To be filled by loader */
|
| /arch/arm/boot/dts/ |
| D | ste-href-tvk1281618-r2.dtsi | 97 * These interrupts cannot be used: the other component
99 * cannot set its DRDY line to open drain, so it cannot be
100 * shared with other peripherals. The should be defined for
101 * the falling edge if they could be wired together.
118 * These interrupts cannot be used: the other component
120 * cannot set its DRDY line to open drain, so it cannot be
121 * shared with other peripherals. The should be defined for
122 * the falling edge if they could be wired together.
139 /* INT2 would need to be open drain */
155 * These interrupts cannot be used: the other component
[all …]
|
| D | xenvm-4.2.dts | 20 /* this field is going to be adjusted by the hypervisor */
50 /* this field is going to be adjusted by the hypervisor */
73 /* this field is going to be adjusted by the hypervisor */
75 /* this field is going to be adjusted by the hypervisor */
|
| /arch/alpha/lib/ |
| D | memchr.S | 72 # Deal with the case where at most 8 bytes remain to be searched
103 # Deal with the case where $18 > 8 bytes remain to be
104 # searched. $16 may not be aligned.
120 # Make $18 point to last quad to be accessed (the
121 # last quad may or may not be partial).
127 # At least two quads remain to be accessed.
129 subq $18, $0, $4 #-e0 : $4 <- nr quads to be processed
133 # At least three quads remain to be accessed
|
| D | ev6-memchr.S | 72 # Deal with the case where at most 8 bytes remain to be searched
123 # Deal with the case where $18 > 8 bytes remain to be
124 # searched. $16 may not be aligned.
139 # Make $18 point to last quad to be accessed (the
140 # last quad may or may not be partial).
145 # At least two quads remain to be accessed.
147 subq $18, $0, $4 # E : $4 <- nr quads to be processed
150 # At least three quads remain to be accessed
|
| /arch/powerpc/lib/ |
| D | rheap.c | 158 unsigned long s, e, bs, be; in attach_free_block() local
176 be = bs + blk->size; in attach_free_block()
181 if (be == s) in attach_free_block()
374 unsigned long s, e, m, bs, be; in rh_detach_region() local
399 be = blk->start + blk->size; in rh_detach_region()
400 if (s >= bs && e <= be) in rh_detach_region()
409 if (bs == s && be == e) { in rh_detach_region()
417 if (bs == s || be == e) { in rh_detach_region()
429 newblk->size = be - e; in rh_detach_region()
531 unsigned long s, e, m, bs = 0, be = 0; in rh_alloc_fixed() local
[all …]
|
| /arch/arm64/boot/dts/amlogic/ |
| D | meson-sm1-odroid-c4.dts | 34 * to be turned high in order to be detected by the USB Controller
35 * This signal should be handled by a USB specific power sequence
|
| /arch/m68k/fpsp040/ |
| D | skeleton.S | 5 | need to be modified to install the FPSP.
8 | Put any target system specific handling that must be done immediately
10 | the 'fpsp_xxxx' handler entry point should be placed in the exception
11 | table so that the 'jmp' can be eliminated. If the FPSP determines that the
12 | exception is one that must be reported then there will be a
14 | the machine state will be identical to the state before
16 | that caused the exception will still be pending when the FPSP
17 | package returns. Thus, there will be system specific code
21 | the return will be via a 'jmp fpsp_done'. Unless there is
22 | OS specific work to be done (such as handling a context switch or
[all …]
|
| D | x_ovfl.S | 7 | too large to be represented in a floating-point data register,
9 | data register are too large to be represented in the
17 | following values should be stored at the destination, based
30 | operand needs to be made available to the users exception handler
|
| /arch/m68k/kernel/ |
| D | vmlinux-std.lds | 42 /* will be freed after init */
53 /* This ALIGN be in a section so that _end is at the end of the
64 /* Sections to be discarded */
|
| /arch/microblaze/ |
| D | Kconfig | 54 microblaze architectures can be configured for either little or
131 work if they are set incorrectly, but can be used to optimize certain
147 memory can be "permanently mapped" by the kernel. The physical
157 will be used as "low memory", that is, memory which the kernel can
159 This can be useful in optimizing the layout of kernel virtual
173 If zero, no change will be made to the MicroBlaze reset vector at
175 If non-zero, a jump instruction to this address, will be written
184 the kernel will map low memory (the kernel image will be linked at
185 this address). This can be useful in optimizing the virtual memory
199 allocated to user tasks. This can be useful in optimizing the
|
| /arch/sparc/kernel/ |
| D | una_asm_32.S | 29 be 2f
31 be 1f
91 be 9f
93 be 6f
98 be 3f
|
| D | head_32.S | 121 be no_sun4u_here
131 be already_mapped
181 be go_to_highmem ! this will be a nop then
215 be leon_remap /* It is a LEON - jump */
221 be halt_notsup
330 be halt_notsup
409 be leon_init
416 be sun4m_init
418 be sun4m_init
420 be sun4d_init
[all …]
|
| /arch/m68k/q40/ |
| D | README | 5 some up to date information. Booter and other tools will be also
12 It seems IRQ unmasking can't be safely done on a Q40. IRQ probing
22 poll the floppy for this reason - something that can't be done in Linux.
44 Various other PC drivers can be enabled simply by adding them to
45 arch/m68k/config.in, especially 8 bit devices should be without any
60 SRAM can also be used as additional console device, use debug=mem.
65 Serial console works and can also be used for debugging, see loader_txt
67 Most problems seem to be caused by fawlty or badly configured io-cards or
105 (a) interrupt handler must not be reentered even when sti() is called
112 because only irq's 4-15 can be disabled - and only all of them at once.
[all …]
|