| /arch/mips/bcm47xx/ |
| D | time.c | 34 u16 chip_id = 0; in plat_time_init() local
50 chip_id = bcm47xx_bus.ssb.chip_id; in plat_time_init()
56 chip_id = bcm47xx_bus.bcma.bus.chipinfo.id; in plat_time_init()
61 if (chip_id == 0x5354) { in plat_time_init()
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| D | prom.c | 46 __init void bcm47xx_set_system_type(u16 chip_id) in bcm47xx_set_system_type() argument
49 (chip_id > 0x9999) ? "Broadcom BCM%d" : in bcm47xx_set_system_type()
51 chip_id); in bcm47xx_set_system_type()
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| D | setup.c | 62 if (bcm47xx_bus.ssb.chip_id == 0x4785) in bcm47xx_machine_restart()
65 if (bcm47xx_bus.ssb.chip_id == 0x4785) { in bcm47xx_machine_restart()
167 bcm47xx_set_system_type(bcm47xx_bus.ssb.chip_id); in plat_mem_setup()
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| /arch/mips/cavium-octeon/executive/ |
| D | octeon-model.c | 58 static const char *__init octeon_model_get_string_buffer(uint32_t chip_id, in octeon_model_get_string_buffer() argument
80 switch ((chip_id >> 8) & 0xff) { in octeon_model_get_string_buffer()
115 sprintf(pass, "%d.%d", (int)((chip_id >> 3) & 7) + 1, (int)chip_id & 7); in octeon_model_get_string_buffer()
192 switch ((chip_id >> 8) & 0xff) { in octeon_model_get_string_buffer()
209 switch (chip_id & 0xf) { in octeon_model_get_string_buffer()
225 if ((chip_id & 0x10) || l2d_fus3) in octeon_model_get_string_buffer()
233 switch (chip_id & 0xf) { in octeon_model_get_string_buffer()
254 switch (chip_id & 0xf) { in octeon_model_get_string_buffer()
273 if ((chip_id & 0xFF) < 0x8) { in octeon_model_get_string_buffer()
274 switch (chip_id & 0x3) { in octeon_model_get_string_buffer()
[all …]
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| /arch/mips/txx9/generic/ |
| D | smsc_fdc37m81x.c | 105 u8 chip_id; in smsc_fdc37m81x_init() local
115 chip_id = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DID); in smsc_fdc37m81x_init()
116 if (chip_id == SMSC_FDC37M81X_CHIP_ID) in smsc_fdc37m81x_init()
119 pr_warn("%s: unknown chip id 0x%02x\n", __func__, chip_id); in smsc_fdc37m81x_init()
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| /arch/powerpc/platforms/powernv/ |
| D | rng.c | 103 int chip_id, cpu; in rng_init_per_cpu() local
105 chip_id = of_get_ibm_chip_id(dn); in rng_init_per_cpu()
106 if (chip_id == -1) in rng_init_per_cpu()
111 cpu_to_chip_id(cpu) == chip_id) { in rng_init_per_cpu()
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| D | opal-hmi.c | 131 be32_to_cpu(hmi_evt->u.xstop_error.u.chip_id)); in print_nx_checkstop_reason()
151 be32_to_cpu(hmi_evt->u.xstop_error.u.chip_id)); in print_npu_checkstop_reason()
172 be32_to_cpu(hmi_evt->u.xstop_error.u.chip_id), in print_npu_checkstop_reason()
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| /arch/mips/ar7/ |
| D | setup.c | 39 u16 chip_id = ar7_chip_id(); in get_system_type() local
42 switch (chip_id) { in get_system_type()
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| /arch/mips/include/asm/mach-bcm47xx/ |
| D | bcm47xx.h | 36 void bcm47xx_set_system_type(u16 chip_id);
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| /arch/mips/include/asm/mach-ar7/ |
| D | ar7.h | 136 u16 chip_id = ar7_chip_id(); in ar7_has_high_cpmac() local
137 switch (chip_id) { in ar7_has_high_cpmac()
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| /arch/powerpc/sysdev/xive/ |
| D | native.c | 247 static s64 opal_xive_allocate_irq(u32 chip_id) in opal_xive_allocate_irq() argument
249 s64 irq = opal_xive_allocate_irq_raw(chip_id); in opal_xive_allocate_irq()
265 irq = opal_xive_allocate_irq(xc->chip_id); in xive_native_get_ipi()
281 u32 xive_native_alloc_irq_on_chip(u32 chip_id) in xive_native_alloc_irq_on_chip() argument
286 rc = opal_xive_allocate_irq(chip_id); in xive_native_alloc_irq_on_chip()
386 xc->chip_id = cpu_to_chip_id(cpu); in xive_native_prepare_cpu()
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| D | xive-internal.h | 23 int chip_id; member
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| D | common.c | 589 if (xc->chip_id == xd->src_chip) in xive_pick_irq_target()
1480 xc->chip_id = XIVE_INVALID_CHIP_ID; in xive_prepare_cpu()
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| /arch/mips/include/asm/octeon/ |
| D | cvmx-mio-defs.h | 1209 uint64_t chip_id:8; member
1213 uint64_t chip_id:8;
1240 uint64_t chip_id:8; member
1248 uint64_t chip_id:8;
1265 uint64_t chip_id:8; member
1273 uint64_t chip_id:8;
1290 uint64_t chip_id:8; member
1294 uint64_t chip_id:8;
1315 uint64_t chip_id:8; member
1321 uint64_t chip_id:8;
[all …]
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| D | octeon-model.h | 395 const char *__init octeon_model_get_string(uint32_t chip_id);
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| /arch/powerpc/include/asm/ |
| D | opal.h | 167 int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
169 int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type,
240 int64_t opal_nmmu_set_ptcr(uint64_t chip_id, uint64_t ptcr);
262 int64_t opal_xive_donate_page(uint32_t chip_id, uint64_t addr);
273 int64_t opal_xive_allocate_irq_raw(uint32_t chip_id);
296 int opal_nx_coproc_init(uint32_t chip_id, uint32_t ct);
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| D | xive.h | 144 extern u32 xive_native_alloc_irq_on_chip(u32 chip_id);
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| D | opal-api.h | 637 __be32 chip_id; /* for CHECKSTOP_TYPE_NX */ member
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| /arch/arc/include/asm/ |
| D | arcregs.h | 164 unsigned int chip_id:16, cpu_id:8, family:8; member
166 unsigned int family:8, cpu_id:8, chip_id:16;
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| /arch/powerpc/kernel/ |
| D | prom.c | 899 u32 chip_id; in of_get_ibm_chip_id() local
905 if (!of_property_read_u32(np, "ibm,chip-id", &chip_id)) { in of_get_ibm_chip_id()
907 return chip_id; in of_get_ibm_chip_id()
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| D | smp.c | 1563 int chip_id = -1; in add_cpu_to_masks() local
1589 chip_id = cpu_to_chip_id(cpu); in add_cpu_to_masks()
1601 if (chip_id == -1) in add_cpu_to_masks()
1605 if (chip_id == cpu_to_chip_id(i)) { in add_cpu_to_masks()
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| /arch/powerpc/perf/ |
| D | imc-pmu.c | 506 int chip_id, rc, node_id; in nest_imc_event_init() local
533 chip_id = cpu_to_chip_id(event->cpu); in nest_imc_event_init()
536 if (chip_id < 0) in nest_imc_event_init()
541 if (pcni->id == chip_id) { in nest_imc_event_init()
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| /arch/arc/kernel/ |
| D | setup.c | 277 core->family, core->cpu_id, core->chip_id); in arc_cpu_mumbojumbo()
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| /arch/x86/kvm/ |
| D | x86.c | 5567 switch (chip->chip_id) { in kvm_vm_ioctl_get_irqchip()
5592 switch (chip->chip_id) { in kvm_vm_ioctl_set_irqchip()
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