Searched refs:cp0 (Results 1 – 16 of 16) sorted by relevance
34 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {36 regulator-name = "cp0-usb3h0-vbus";43 cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {45 regulator-name = "cp0-usb3h1-vbus";52 cp0_usb3_0_phy: cp0-usb3-0-phy {107 phy-names = "cp0-pcie0-x1-phy";114 phy-names = "cp0-pcie2-x1-phy";148 phy-names = "cp0-sata0-0-phy";152 phy-names = "cp0-sata0-1-phy";
33 regulator-name = "cp0-usb3-0-current-regulator";46 regulator-name = "cp0-usb3-1-current-regulator";57 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {67 cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {118 phy-names = "cp0-pcie2-x1-phy";217 phy-names = "cp0-sata0-1-phy";234 phy-names = "cp0-usb3h0-comphy", "utmi";248 phy-names = "cp0-usb3h1-comphy", "utmi";
39 regulator-name = "cp0-xhci1-vbus";93 cp0_i2c0_pins: cp0-i2c-pins-0 {97 cp0_i2c1_pins: cp0-i2c-pins-1 {101 cp0_sdhci_cd_pins_crb: cp0-sdhci-cd-pins-crb {105 cp0_sdhci_pins: cp0-sdhi-pins-0 {110 cp0_spi1_pins: cp0-spi-pins-1 {
44 regulator-name = "cp0-xhci0-vbus";58 regulator-name = "cp0-xhci1-vbus";343 cp0_i2c0_pins: cp0-i2c-pins-0 {347 cp0_i2c1_pins: cp0-i2c-pins-1 {351 cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {358 cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {365 cp0_sdhci_cd_pins: cp0-sdhci-cd-pins-0 {369 cp0_sdhci_pins: cp0-sdhi-pins-0 {374 cp0_spi1_pins: cp0-spi-pins-1 {
188 phy-names = "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy",189 "cp0-pcie0-x4-lane2-phy", "cp0-pcie0-x4-lane3-phy";248 phy-names = "cp0-sata0-1-phy";
27 #define CP11X_NAME cp0
20 #define CP11X_NAME cp0
67 sfp_cp0_eth0: sfp-cp0-eth0 {337 phy-names = "cp0-pcie0-x1-phy";411 phy-names = "cp0-sata0-0-phy";416 phy-names = "cp0-sata0-1-phy";
22 #define CP11X_NAME cp0
64 sfp_cp0_eth0: sfp-cp0-eth0 {369 phy-names = "cp0-pcie0-x1-phy";
76 obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o77 obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o78 obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o79 obj-$(CONFIG_CPU_PJ4) += pj4-cp0.o80 obj-$(CONFIG_CPU_PJ4B) += pj4-cp0.o
36 xtregs_cp0_t cp0; member
166 xtregs_cp0_t cp0; member
138 newregs->cp0 = ti->xtregs_cp.cp0; in tie_get()177 ti->xtregs_cp.cp0 = newregs->cp0; in tie_set()
100 DEFINE(THREAD_XTREGS_CP0, offsetof(struct thread_info, xtregs_cp.cp0)); in main()
307 "presence-cp0",