| /arch/arm/boot/dts/ |
| D | intel-ixp42x-arcom-vulcan.dts | 55 intel,ixp4xx-eb-t3 = <3>;
56 intel,ixp4xx-eb-byte-access-on-halfword = <1>;
57 intel,ixp4xx-eb-write-enable = <1>;
71 intel,ixp4xx-eb-t3 = <1>;
72 intel,ixp4xx-eb-t4 = <2>;
73 intel,ixp4xx-eb-ahb-split-transfers = <1>;
74 intel,ixp4xx-eb-write-enable = <1>;
75 intel,ixp4xx-eb-byte-access = <1>;
90 intel,ixp4xx-eb-t3 = <3>;
91 intel,ixp4xx-eb-cycle-type = <1>; /* Motorola cycles */
[all …]
|
| D | intel-ixp4xx-reference-design.dtsi | 62 intel,ixp4xx-eb-t1 = <0>;
63 intel,ixp4xx-eb-t2 = <0>;
64 intel,ixp4xx-eb-t3 = <1>; // 1 cycle extra strobe phase
65 intel,ixp4xx-eb-t4 = <0>;
66 intel,ixp4xx-eb-t5 = <0>;
67 intel,ixp4xx-eb-cycle-type = <0>; // Intel cycle type
68 intel,ixp4xx-eb-byte-access-on-halfword = <0>;
69 intel,ixp4xx-eb-mux-address-and-data = <0>;
70 intel,ixp4xx-eb-ahb-split-transfers = <0>;
71 intel,ixp4xx-eb-write-enable = <1>;
[all …]
|
| D | intel-ixp42x-gateworks-gw2348.dts | 72 intel,ixp4xx-eb-write-enable = <1>;
89 intel,ixp4xx-eb-t1 = <3>; // 3 cycles extra address phase
90 intel,ixp4xx-eb-t2 = <3>; // 3 cycles extra setup phase
91 intel,ixp4xx-eb-t3 = <15>; // 15 cycles extra strobe phase
92 intel,ixp4xx-eb-t4 = <3>; // 3 cycles extra hold phase
93 intel,ixp4xx-eb-t5 = <15>; // 15 cycles extra recovery phase
94 intel,ixp4xx-eb-cycle-type = <0>; // Intel cycle type
95 intel,ixp4xx-eb-byte-access-on-halfword = <1>;
96 intel,ixp4xx-eb-mux-address-and-data = <0>;
97 intel,ixp4xx-eb-ahb-split-transfers = <0>;
[all …]
|
| D | intel-ixp43x-gateworks-gw2358.dts | 85 intel,ixp4xx-eb-write-enable = <1>;
105 intel,ixp4xx-eb-t1 = <3>; // 3 cycles extra address phase
106 intel,ixp4xx-eb-t2 = <3>; // 3 cycles extra setup phase
107 intel,ixp4xx-eb-t3 = <15>; // 15 cycles extra strobe phase
108 intel,ixp4xx-eb-t4 = <3>; // 3 cycles extra hold phase
109 intel,ixp4xx-eb-t5 = <15>; // 15 cycles extra recovery phase
110 intel,ixp4xx-eb-cycle-type = <0>; // Intel cycle type
111 intel,ixp4xx-eb-byte-access-on-halfword = <1>;
112 intel,ixp4xx-eb-mux-address-and-data = <0>;
113 intel,ixp4xx-eb-ahb-split-transfers = <0>;
[all …]
|
| D | arm-realview-eb.dts | 26 #include "arm-realview-eb.dtsi"
30 compatible = "arm,realview-eb";
39 * qemu-system-arm -M realview-eb
47 compatible = "arm,realview-eb-soc", "simple-bus";
|
| D | arm-realview-eb-11mp-bbrevd.dts | 23 #include "arm-realview-eb-11mp.dts"
24 #include "arm-realview-eb-bbrevd.dtsi"
|
| D | arm-realview-eb-bbrevd.dts | 24 #include "arm-realview-eb.dts"
25 #include "arm-realview-eb-bbrevd.dtsi"
|
| D | arm-realview-eb-a9mp-bbrevd.dts | 23 #include "arm-realview-eb-a9mp.dts"
24 #include "arm-realview-eb-bbrevd.dtsi"
|
| D | arm-realview-eb-11mp-bbrevd-ctrevb.dts | 23 #include "arm-realview-eb-11mp-ctrevb.dts"
24 #include "arm-realview-eb-bbrevd.dtsi"
|
| D | arm-realview-eb-11mp-ctrevb.dts | 23 #include "arm-realview-eb-11mp.dts"
34 compatible = "arm,realview-eb11mp-revb-syscon", "arm,realview-eb-syscon", "syscon", "simple-mfd";
|
| D | arm-realview-eb-11mp.dts | 24 #include "arm-realview-eb-mp.dtsi"
35 * qemu-system-arm -M realview-eb-mpcore -smp cpus=4
|
| D | intel-ixp46x-ixdp465.dts | 25 intel,ixp4xx-eb-write-enable = <1>;
|
| D | intel-ixp43x-kixrp435.dts | 25 intel,ixp4xx-eb-write-enable = <1>;
|
| D | intel-ixp42x-ixdp425.dts | 29 intel,ixp4xx-eb-write-enable = <1>;
|
| D | arm-realview-eb-mp.dtsi | 25 #include "arm-realview-eb.dtsi"
36 compatible = "arm,realview-eb-soc", "simple-bus";
|
| D | intel-ixp42x-netgear-wg302v2.dts | 47 intel,ixp4xx-eb-write-enable = <1>;
|
| D | arm-realview-eb-a9mp.dts | 24 #include "arm-realview-eb-mp.dtsi"
|
| D | intel-ixp42x-adi-coyote.dts | 48 intel,ixp4xx-eb-write-enable = <1>;
|
| D | intel-ixp42x-ixdpg425.dts | 53 intel,ixp4xx-eb-write-enable = <1>;
|
| D | intel-ixp42x-freecom-fsg-3.dts | 90 intel,ixp4xx-eb-write-enable = <1>;
|
| /arch/sparc/kernel/ |
| D | btext.c | 268 unsigned int *eb = (int *)expand_bits_16; in draw_byte_16() local
273 base[0] = (eb[bits >> 6] & fg) ^ bg; in draw_byte_16()
274 base[1] = (eb[(bits >> 4) & 3] & fg) ^ bg; in draw_byte_16()
275 base[2] = (eb[(bits >> 2) & 3] & fg) ^ bg; in draw_byte_16()
276 base[3] = (eb[bits & 3] & fg) ^ bg; in draw_byte_16()
286 unsigned int *eb = (int *)expand_bits_8; in draw_byte_8() local
291 base[0] = (eb[bits >> 4] & fg) ^ bg; in draw_byte_8()
292 base[1] = (eb[bits & 0xf] & fg) ^ bg; in draw_byte_8()
|
| /arch/powerpc/kernel/ |
| D | btext.c | 437 unsigned int *eb = (int *)expand_bits_16; in draw_byte_16() local
442 base[0] = (eb[bits >> 6] & fg) ^ bg; in draw_byte_16()
443 base[1] = (eb[(bits >> 4) & 3] & fg) ^ bg; in draw_byte_16()
444 base[2] = (eb[(bits >> 2) & 3] & fg) ^ bg; in draw_byte_16()
445 base[3] = (eb[bits & 3] & fg) ^ bg; in draw_byte_16()
455 unsigned int *eb = (int *)expand_bits_8; in draw_byte_8() local
460 base[0] = (eb[bits >> 4] & fg) ^ bg; in draw_byte_8()
461 base[1] = (eb[bits & 0xf] & fg) ^ bg; in draw_byte_8()
|
| /arch/x86/mm/ |
| D | numa_emulation.c | 50 struct numa_memblk *eb = &ei->blk[ei->nr_blks]; in emu_setup_memblk() local
59 eb->start = pb->start; in emu_setup_memblk()
60 eb->end = pb->start + size; in emu_setup_memblk()
61 eb->nid = nid; in emu_setup_memblk()
73 nid, eb->start, eb->end - 1, (eb->end - eb->start) >> 20); in emu_setup_memblk()
|
| /arch/powerpc/crypto/ |
| D | aes-tab-4k.S | 43 .long R(ef, fa, fa, 15), R(b2, 59, 59, eb)
63 .long R(cd, eb, eb, 26), R(4e, 27, 27, 69)
145 .long R(d9, e1, e1, 38), R(eb, f8, f8, 13)
177 .long R(bf, 6d, 7a, eb), R(95, 52, 59, da)
192 .long R(b2, eb, 28, 07), R(2f, b5, c2, 03)
201 .long R(05, 8a, e1, 32), R(a4, f6, eb, 75)
277 .long R(59, f8, 14, 8e), R(eb, 13, 3c, 89)
|
| /arch/ia64/kernel/ |
| D | mca_drv.c | 424 if (pbci->eb) in is_mca_global()
584 if (psp->bc && pbci->eb && pbci->bsi == 0) { in recover_from_platform_error()
702 if (pbci->eb && pbci->bsi > 0) in recover_from_processor_error()
|