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Searched refs:encoding (Results 1 – 13 of 13) sorted by relevance

/arch/sh/kernel/
Ddwarf.c224 char encoding) in dwarf_read_encoded_value() argument
229 switch (encoding & 0x70) { in dwarf_read_encoded_value()
236 pr_debug("encoding=0x%x\n", (encoding & 0x70)); in dwarf_read_encoded_value()
240 if ((encoding & 0x07) == 0x00) in dwarf_read_encoded_value()
241 encoding |= DW_EH_PE_udata4; in dwarf_read_encoded_value()
243 switch (encoding & 0x0f) { in dwarf_read_encoded_value()
251 pr_debug("encoding=0x%x\n", encoding); in dwarf_read_encoded_value()
809 cie->encoding = *(char *)p++; in dwarf_parse_cie()
892 if (cie->encoding) in dwarf_parse_fde()
894 cie->encoding); in dwarf_parse_fde()
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/arch/arm/kernel/
Dhead.S110 THUMB( it eq ) @ force fixup-able long branch encoding
117 THUMB( it lo ) @ force fixup-able long branch encoding
404 THUMB( it eq ) @ force fixup-able long branch encoding
Dphys2virt.S92 @ needed. The encoding of the immediate is rather complex for values
/arch/arm/mm/
Dproc-macros.S83 and \tmp, \tmp, #0xf @ cache line size encoding
100 and \tmp, \tmp, #0xf @ cache line size encoding
/arch/sh/include/asm/
Ddwarf.h238 unsigned char encoding; member
/arch/s390/kernel/
Dsysinfo.c67 static bool convert_ext_name(unsigned char encoding, char *name, size_t len) in convert_ext_name() argument
69 switch (encoding) { in convert_ext_name()
/arch/m68k/fpsp040/
Dx_fline.S63 cmpib #0x17,%d1 |check if it is an FMOVECR encoding
/arch/x86/boot/
Dheader.S480 # has been achieved. The smallest block type encoding is always used.
490 # dynamic tree encoding.
/arch/sparc/kernel/
Dperf_event.c124 u16 encoding; member
134 return ((unsigned long) pmap->encoding << 16) | pmap->pic_mask; in perf_event_encode()
1218 if (pmap->encoding == CACHE_OP_UNSUPPORTED) in sparc_map_cache_event()
1221 if (pmap->encoding == CACHE_OP_NONSENSE) in sparc_map_cache_event()
/arch/x86/kvm/vmx/
Dnested.c50 u16 encoding; member
76 u16 field = entry.encoding; in init_vmcs_shadow_fields()
80 shadow_read_only_fields[i + 1].encoding != field + 1)) in init_vmcs_shadow_fields()
97 u16 field = entry.encoding; in init_vmcs_shadow_fields()
101 shadow_read_write_fields[i + 1].encoding != field + 1)) in init_vmcs_shadow_fields()
1544 val = __vmcs_readl(field.encoding); in copy_shadow_to_vmcs12()
1545 vmcs12_write_any(vmcs12, field.encoding, field.offset, val); in copy_shadow_to_vmcs12()
1578 val = vmcs12_read_any(vmcs12, field.encoding, in copy_vmcs12_to_shadow()
1580 __vmcs_writel(field.encoding, val); in copy_vmcs12_to_shadow()
/arch/arc/
DKconfig360 ISA mandates even/odd registers to allow encoding of two
/arch/arm/boot/compressed/
Dhead.S703 and \tmp, \tmp, #0xf @ cache line size encoding
/arch/x86/crypto/
Daesni-intel_asm.S247 # GCM_INIT initializes a gcm_context struct to prepare for encoding/decoding.