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Searched refs:esr (Results 1 – 25 of 63) sorted by relevance

123

/arch/arm64/mm/
Dfault.c50 int (*fn)(unsigned long far, unsigned long esr,
60 static inline const struct fault_info *esr_to_fault_info(unsigned long esr) in esr_to_fault_info() argument
62 return fault_info + (esr & ESR_ELx_FSC); in esr_to_fault_info()
65 static inline const struct fault_info *esr_to_debug_fault_info(unsigned long esr) in esr_to_debug_fault_info() argument
67 return debug_fault_info + DBG_ESR_EVT(esr); in esr_to_debug_fault_info()
70 static void data_abort_decode(unsigned long esr) in data_abort_decode() argument
74 if (esr & ESR_ELx_ISV) { in data_abort_decode()
76 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT)); in data_abort_decode()
78 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT, in data_abort_decode()
79 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT); in data_abort_decode()
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/arch/arm64/kernel/
Dentry-common.c281 unsigned long esr) in __panic_unhandled() argument
288 vector, smp_processor_id(), esr, in __panic_unhandled()
289 esr_get_class_string(esr)); in __panic_unhandled()
291 trace_android_rvh_panic_unhandled(regs, vector, esr); in __panic_unhandled()
358 static void noinstr el1_abort(struct pt_regs *regs, unsigned long esr) in el1_abort() argument
364 do_mem_abort(far, esr, regs); in el1_abort()
369 static void noinstr el1_pc(struct pt_regs *regs, unsigned long esr) in el1_pc() argument
375 do_sp_pc_abort(far, esr, regs); in el1_pc()
380 static void noinstr el1_undef(struct pt_regs *regs, unsigned long esr) in el1_undef() argument
384 do_el1_undef(regs, esr); in el1_undef()
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Dtraps.c248 unsigned long esr = tsk->thread.fault_code; in arm64_show_signal() local
258 if (esr) in arm64_show_signal()
259 pr_cont("%s, ESR 0x%016lx, ", esr_get_class_string(esr), esr); in arm64_show_signal()
455 void do_el0_undef(struct pt_regs *regs, unsigned long esr) in do_el0_undef() argument
478 void do_el1_undef(struct pt_regs *regs, unsigned long esr) in do_el1_undef() argument
489 die("Oops - Undefined instruction", regs, esr); in do_el1_undef()
497 void do_el1_bti(struct pt_regs *regs, unsigned long esr) in do_el1_bti() argument
499 die("Oops - BTI", regs, esr); in do_el1_bti()
502 void do_el0_fpac(struct pt_regs *regs, unsigned long esr) in do_el0_fpac() argument
504 force_signal_inject(SIGILL, ILL_ILLOPN, regs->pc, esr); in do_el0_fpac()
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Ddebug-monitors.c205 static int call_step_hook(struct pt_regs *regs, unsigned long esr) in call_step_hook() argument
218 retval = hook->fn(regs, esr); in call_step_hook()
241 static int single_step_handler(unsigned long unused, unsigned long esr, in single_step_handler() argument
253 if (!handler_found && call_step_hook(regs, esr) == DBG_HOOK_HANDLED) in single_step_handler()
306 static int call_break_hook(struct pt_regs *regs, unsigned long esr) in call_break_hook() argument
310 int (*fn)(struct pt_regs *regs, unsigned long esr) = NULL; in call_break_hook()
319 unsigned long comment = esr & ESR_ELx_BRK64_ISS_COMMENT_MASK; in call_break_hook()
325 return fn ? fn(regs, esr) : DBG_HOOK_ERROR; in call_break_hook()
329 static int brk_handler(unsigned long unused, unsigned long esr, in brk_handler() argument
332 if (call_break_hook(regs, esr) == DBG_HOOK_HANDLED) in brk_handler()
Dfpsimd.c1375 void do_sve_acc(unsigned long esr, struct pt_regs *regs) in do_sve_acc() argument
1417 void do_sme_acc(unsigned long esr, struct pt_regs *regs) in do_sme_acc() argument
1429 if (ESR_ELx_ISS(esr) != ESR_ELx_SME_ISS_SME_DISABLED) { in do_sme_acc()
1461 void do_fpsimd_acc(unsigned long esr, struct pt_regs *regs) in do_fpsimd_acc() argument
1470 void do_fpsimd_exc(unsigned long esr, struct pt_regs *regs) in do_fpsimd_exc() argument
1474 if (esr & ESR_ELx_FP_EXC_TFV) { in do_fpsimd_exc()
1475 if (esr & FPEXC_IOF) in do_fpsimd_exc()
1477 else if (esr & FPEXC_DZF) in do_fpsimd_exc()
1479 else if (esr & FPEXC_OFF) in do_fpsimd_exc()
1481 else if (esr & FPEXC_UFF) in do_fpsimd_exc()
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/arch/arm64/include/asm/
Dexception.h19 unsigned long esr = ESR_ELx_EC_SERROR << ESR_ELx_EC_SHIFT; in disr_to_esr() local
22 esr |= (disr & DISR_EL1_ESR_MASK); in disr_to_esr()
24 esr |= (disr & ESR_ELx_ISS_MASK); in disr_to_esr()
26 return esr; in disr_to_esr()
55 void do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *regs);
56 void do_el0_undef(struct pt_regs *regs, unsigned long esr);
57 void do_el1_undef(struct pt_regs *regs, unsigned long esr);
59 void do_el1_bti(struct pt_regs *regs, unsigned long esr);
60 void do_debug_exception(unsigned long addr_if_watchpoint, unsigned long esr,
62 void do_fpsimd_acc(unsigned long esr, struct pt_regs *regs);
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Dtraps.h59 static inline bool arm64_is_ras_serror(unsigned long esr) in arm64_is_ras_serror() argument
63 if (esr & ESR_ELx_IDS) in arm64_is_ras_serror()
79 static inline unsigned long arm64_ras_serror_get_severity(unsigned long esr) in arm64_ras_serror_get_severity() argument
81 unsigned long aet = esr & ESR_ELx_AET; in arm64_ras_serror_get_severity()
83 if (!arm64_is_ras_serror(esr)) { in arm64_ras_serror_get_severity()
92 if ((esr & ESR_ELx_FSC) != ESR_ELx_FSC_SERROR) { in arm64_ras_serror_get_severity()
100 bool arm64_is_fatal_ras_serror(struct pt_regs *regs, unsigned long esr);
101 void __noreturn arm64_serror_panic(struct pt_regs *regs, unsigned long esr);
Dkvm_hypevents.h62 HE_PROTO(u64 esr, u64 addr),
64 he_field(u64, esr)
68 __entry->esr = esr;
72 __entry->esr, __entry->addr)
Desr.h74 #define ESR_ELx_EC(esr) (((esr) & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT) argument
79 #define ESR_ELx_ISS(esr) ((esr) & ESR_ELx_ISS_MASK) argument
196 #define ESR_ELx_SYS64_ISS_RT(esr) \ argument
197 (((esr) & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT)
343 static inline bool esr_is_data_abort(unsigned long esr) in esr_is_data_abort() argument
345 const unsigned long ec = ESR_ELx_EC(esr); in esr_is_data_abort()
350 const char *esr_get_class_string(unsigned long esr);
Ddebug-monitors.h79 int (*fn)(struct pt_regs *regs, unsigned long esr);
90 int (*fn)(struct pt_regs *regs, unsigned long esr);
Dkvm_ras.h17 static inline int kvm_handle_guest_sea(phys_addr_t addr, unsigned int esr) in kvm_handle_guest_sea() argument
Dkvm_emulate.h244 u32 esr = kvm_vcpu_get_esr(vcpu); in kvm_vcpu_get_condition() local
246 if (esr & ESR_ELx_CV) in kvm_vcpu_get_condition()
247 return (esr & ESR_ELx_COND_MASK) >> ESR_ELx_COND_SHIFT; in kvm_vcpu_get_condition()
375 u32 esr = kvm_vcpu_get_esr(vcpu); in kvm_vcpu_sys_get_rt() local
376 return ESR_ELx_SYS64_ISS_RT(esr); in kvm_vcpu_sys_get_rt()
/arch/arm64/kvm/
Dinject_fault.c21 u32 esr = 0; in inject_abt64() local
32 esr |= ESR_ELx_IL; in inject_abt64()
39 esr |= (ESR_ELx_EC_IABT_LOW << ESR_ELx_EC_SHIFT); in inject_abt64()
41 esr |= (ESR_ELx_EC_IABT_CUR << ESR_ELx_EC_SHIFT); in inject_abt64()
44 esr |= ESR_ELx_EC_DABT_LOW << ESR_ELx_EC_SHIFT; in inject_abt64()
46 vcpu_write_sys_reg(vcpu, esr | ESR_ELx_FSC_EXTABT, ESR_EL1); in inject_abt64()
51 u32 esr = (ESR_ELx_EC_UNKNOWN << ESR_ELx_EC_SHIFT); in inject_undef64() local
60 esr |= ESR_ELx_IL; in inject_undef64()
62 vcpu_write_sys_reg(vcpu, esr, ESR_EL1); in inject_undef64()
143 unsigned long addr, esr; in kvm_inject_size_fault() local
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Dhandle_exit.c30 static void kvm_handle_guest_serror(struct kvm_vcpu *vcpu, u32 esr) in kvm_handle_guest_serror() argument
32 if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(NULL, esr)) in kvm_handle_guest_serror()
95 u64 esr = kvm_vcpu_get_esr(vcpu); in kvm_handle_wfx() local
97 if (esr & ESR_ELx_WFx_ISS_WFE) { in kvm_handle_wfx()
105 if (esr & ESR_ELx_WFx_ISS_WFxT) { in kvm_handle_wfx()
106 if (esr & ESR_ELx_WFx_ISS_RV) { in kvm_handle_wfx()
116 esr &= ~ESR_ELx_WFx_ISS_WFxT; in kvm_handle_wfx()
120 if (esr & ESR_ELx_WFx_ISS_WFE) { in kvm_handle_wfx()
123 if (esr & ESR_ELx_WFx_ISS_WFxT) in kvm_handle_wfx()
148 u32 esr = kvm_vcpu_get_esr(vcpu); in kvm_handle_guest_debug() local
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Dsys_regs.h30 #define esr_sys64_to_params(esr) \ argument
31 ((struct sys_reg_params){ .Op0 = ((esr) >> 20) & 3, \
32 .Op1 = ((esr) >> 14) & 0x7, \
33 .CRn = ((esr) >> 10) & 0xf, \
34 .CRm = ((esr) >> 1) & 0xf, \
35 .Op2 = ((esr) >> 17) & 0x7, \
36 .is_write = !((esr) & 1) })
38 #define esr_cp1x_32_to_params(esr) \ argument
39 ((struct sys_reg_params){ .Op1 = ((esr) >> 14) & 0x7, \
40 .CRn = ((esr) >> 10) & 0xf, \
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/arch/alpha/kernel/
Dcore_lca.c338 mem_error(unsigned long esr, unsigned long ear) in mem_error() argument
341 ((esr & ESR_CEE) ? "Correctable" : in mem_error()
342 (esr & ESR_UEE) ? "Uncorrectable" : "A"), in mem_error()
343 (esr & ESR_WRE) ? "write" : "read", in mem_error()
344 (esr & ESR_SOR) ? "memory" : "b-cache", in mem_error()
346 if (esr & ESR_CTE) { in mem_error()
349 if (esr & ESR_MSE) { in mem_error()
352 if (esr & ESR_MHE) { in mem_error()
355 if (esr & ESR_NXM) { in mem_error()
435 if (el.s->esr & ESR_EAV) { in lca_machine_check()
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/arch/sh/boards/mach-dreamcast/
Dirq.c90 __u32 esr = ESR_BASE + (LEVEL(irq) << 2); in mask_ack_systemasic_irq() local
92 outl((1 << EVENT_BIT(irq)), esr); in mask_ack_systemasic_irq()
107 __u32 emr, esr, status, level; in systemasic_irq_demux() local
124 esr = ESR_BASE + (level << 2); in systemasic_irq_demux()
127 status = inl(esr); in systemasic_irq_demux()
/arch/arm64/kvm/hyp/include/hyp/
Dfault.h44 static inline bool __get_fault_info(u64 esr, struct kvm_vcpu_fault_info *fault) in __get_fault_info() argument
61 if (!(esr & ESR_ELx_S1PTW) && in __get_fault_info()
63 (esr & ESR_ELx_FSC_TYPE) == FSC_PERM)) { in __get_fault_info()
/arch/powerpc/platforms/44x/
Dmachine_check.c14 unsigned long reason = regs->esr; in machine_check_440A()
51 unsigned long reason = regs->esr; in machine_check_47x()
/arch/arm64/kvm/hyp/include/nvhe/
Diommu.h67 u32 esr, size_t off);
96 bool pkvm_iommu_host_dabt_handler(struct kvm_cpu_context *host_ctxt, u32 esr,
/arch/powerpc/platforms/4xx/
Dmachine_check.c13 unsigned long reason = regs->esr; in machine_check_4xx()
/arch/mips/include/asm/octeon/
Dcvmx-sli-defs.h107 __BITFIELD_FIELD(uint64_t esr:2,
119 __BITFIELD_FIELD(uint64_t esr:2,
/arch/arm64/kvm/hyp/nvhe/
Dmem_protect.c807 u64 esr = read_sysreg_el2(SYS_ESR); in host_inject_abort() local
815 ec = ESR_ELx_EC(esr); in host_inject_abort()
822 esr &= ~ESR_ELx_EC_MASK; in host_inject_abort()
823 esr |= ec << ESR_ELx_EC_SHIFT; in host_inject_abort()
835 esr |= ESR_ELx_S1PTW; in host_inject_abort()
837 write_sysreg_el1(esr, SYS_ESR); in host_inject_abort()
851 static bool is_dabt(u64 esr) in is_dabt() argument
853 return ESR_ELx_EC(esr) == ESR_ELx_EC_DABT_LOW; in is_dabt()
856 static int (*perm_fault_handler)(struct kvm_cpu_context *host_ctxt, u64 esr, u64 addr);
858 int hyp_register_host_perm_fault_handler(int (*cb)(struct kvm_cpu_context *ctxt, u64 esr, u64 addr)) in hyp_register_host_perm_fault_handler() argument
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Dhyp-main.c140 u32 esr = (ESR_ELx_EC_UNKNOWN << ESR_ELx_EC_SHIFT); in handle_pvm_entry_sys64() local
142 __vcpu_sys_reg(&hyp_vcpu->vcpu, ESR_EL1) = esr; in handle_pvm_entry_sys64()
164 u32 esr = ESR_ELx_IL; in handle_pvm_entry_iabt() local
174 esr |= (ESR_ELx_EC_IABT_LOW << ESR_ELx_EC_SHIFT); in handle_pvm_entry_iabt()
176 esr |= (ESR_ELx_EC_IABT_CUR << ESR_ELx_EC_SHIFT); in handle_pvm_entry_iabt()
178 esr |= ESR_ELx_FSC_EXTABT; in handle_pvm_entry_iabt()
180 __vcpu_sys_reg(&hyp_vcpu->vcpu, ESR_EL1) = esr; in handle_pvm_entry_iabt()
196 u32 esr = ESR_ELx_IL; in handle_pvm_entry_dabt() local
199 esr |= (ESR_ELx_EC_DABT_LOW << ESR_ELx_EC_SHIFT); in handle_pvm_entry_dabt()
201 esr |= (ESR_ELx_EC_DABT_CUR << ESR_ELx_EC_SHIFT); in handle_pvm_entry_dabt()
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/arch/arm64/kernel/probes/
Duprobes.c169 unsigned long esr) in uprobe_breakpoint_handler() argument
178 unsigned long esr) in uprobe_single_step_handler() argument

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