Searched refs:generate (Results 1 – 24 of 24) sorted by relevance
/arch/mips/bcm47xx/ |
D | Kconfig | 21 This will generate an image with support for SSB and MIPS32 R1 instruction set. 38 This will generate an image with support for BCMA and MIPS32 R2 instruction set.
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/arch/mips/loongson64/ |
D | Platform | 11 # that GCC might generate R2 code for -march=loongson3a which then is rejected
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/arch/arm/include/debug/ |
D | sa1100.S | 42 @ clear top bits, and generate both phys and virt addresses
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/arch/m68k/fpsp040/ |
D | scosh.S | 43 | Huge*Huge to generate overflow and an infinity with
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D | ssinh.S | 44 | sign(X)*Huge*Huge to generate overflow and an infinity with
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D | res_func.S | 826 | denorm and it will correctly generate the result in extended 1001 | denorm and it will correctly generate the result in extended
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D | setox.S | 53 | Notes: This will always generate one exception -- inexact.
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/arch/powerpc/include/asm/ |
D | cell-regs.h | 182 u64 generate; member
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/arch/powerpc/platforms/cell/ |
D | interrupt.c | 170 out_be64(&per_cpu(cpu_iic, cpu).regs->generate, (0xf - msg) << 4); in iic_message_pass()
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/arch/powerpc/boot/dts/ |
D | acadia.dts | 176 * that it uses to generate snapshot triggers. We
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/arch/arm/boot/dts/ |
D | imx7d-flex-concentrator.dts | 150 * MDIO bus reset is used to generate PHY device reset before
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/arch/arm64/boot/dts/rockchip/ |
D | rk3399-gru-chromebook.dtsi | 242 * set this here, because rk3399-gru.dtsi ensures we can generate this
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/arch/x86/boot/ |
D | header.S | 297 # tries to generate a 3-byte jump here, which causes
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/arch/arm64/ |
D | Kconfig | 497 doesn't generate a fault before handling the Stage 2 fault. 588 …ing out-of-context translation regime could cause subsequent request to generate an incorrect tran… 601 …ing out-of-context translation regime could cause subsequent request to generate an incorrect tran… 614 …ing out-of-context translation regime could cause subsequent request to generate an incorrect tran… 809 for TRBE. Under some conditions, the TRBE might generate a write to the next 827 for TRBE. Under some conditions, the TRBE might generate a write to the next 1032 Socionext Synquacer SoCs implement a separate h/w block to generate
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/arch/sparc/lib/ |
D | M7memcpy.S | 564 alignaddr %o1, %g0, %g0 ! generate %gsr 676 alignaddr %o1, %g0, %g0 ! generate %gsr
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/arch/powerpc/ |
D | Kconfig.debug | 65 feature checks. This should generate more optimal code for those
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/arch/arm/mach-pxa/ |
D | Kconfig | 522 Say Y here to enable the tosa keyboard driver to generate extended
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/arch/sparc/ |
D | Kconfig | 453 from the bootloader that makes the GRPCI to generate interrupts
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/arch/arc/ |
D | Kconfig | 359 Enable gcc to generate 64-bit load/store instructions
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/arch/ |
D | Kconfig | 375 System hardware can generate an NMI using the perf event
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/arch/x86/ |
D | Kconfig | 1081 Some chipsets generate a legacy INTx "boot IRQ" when the IRQ 1802 (Intel Bull Mountain technology) to generate random numbers.
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/arch/arm/ |
D | Kconfig | 1925 Note that gcc does not generate 80-bit operations by default,
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/arch/m68k/ifpsp060/src/ |
D | fplsp.S | 6707 # Notes: This will always generate one exception -- inexact. # 7604 # Huge*Huge to generate overflow and an infinity with # 7719 # sign(X)*Huge*Huge to generate overflow and an infinity with #
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D | fpsp.S | 8982 # generate underflow by Tiny * Tiny. #
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