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/arch/mips/bcm47xx/
DKconfig21 This will generate an image with support for SSB and MIPS32 R1 instruction set.
38 This will generate an image with support for BCMA and MIPS32 R2 instruction set.
/arch/mips/loongson64/
DPlatform11 # that GCC might generate R2 code for -march=loongson3a which then is rejected
/arch/arm/include/debug/
Dsa1100.S42 @ clear top bits, and generate both phys and virt addresses
/arch/m68k/fpsp040/
Dscosh.S43 | Huge*Huge to generate overflow and an infinity with
Dssinh.S44 | sign(X)*Huge*Huge to generate overflow and an infinity with
Dres_func.S826 | denorm and it will correctly generate the result in extended
1001 | denorm and it will correctly generate the result in extended
Dsetox.S53 | Notes: This will always generate one exception -- inexact.
/arch/powerpc/include/asm/
Dcell-regs.h182 u64 generate; member
/arch/powerpc/platforms/cell/
Dinterrupt.c170 out_be64(&per_cpu(cpu_iic, cpu).regs->generate, (0xf - msg) << 4); in iic_message_pass()
/arch/powerpc/boot/dts/
Dacadia.dts176 * that it uses to generate snapshot triggers. We
/arch/arm/boot/dts/
Dimx7d-flex-concentrator.dts150 * MDIO bus reset is used to generate PHY device reset before
/arch/arm64/boot/dts/rockchip/
Drk3399-gru-chromebook.dtsi242 * set this here, because rk3399-gru.dtsi ensures we can generate this
/arch/x86/boot/
Dheader.S297 # tries to generate a 3-byte jump here, which causes
/arch/arm64/
DKconfig497 doesn't generate a fault before handling the Stage 2 fault.
588 …ing out-of-context translation regime could cause subsequent request to generate an incorrect tran…
601 …ing out-of-context translation regime could cause subsequent request to generate an incorrect tran…
614 …ing out-of-context translation regime could cause subsequent request to generate an incorrect tran…
809 for TRBE. Under some conditions, the TRBE might generate a write to the next
827 for TRBE. Under some conditions, the TRBE might generate a write to the next
1032 Socionext Synquacer SoCs implement a separate h/w block to generate
/arch/sparc/lib/
DM7memcpy.S564 alignaddr %o1, %g0, %g0 ! generate %gsr
676 alignaddr %o1, %g0, %g0 ! generate %gsr
/arch/powerpc/
DKconfig.debug65 feature checks. This should generate more optimal code for those
/arch/arm/mach-pxa/
DKconfig522 Say Y here to enable the tosa keyboard driver to generate extended
/arch/sparc/
DKconfig453 from the bootloader that makes the GRPCI to generate interrupts
/arch/arc/
DKconfig359 Enable gcc to generate 64-bit load/store instructions
/arch/
DKconfig375 System hardware can generate an NMI using the perf event
/arch/x86/
DKconfig1081 Some chipsets generate a legacy INTx "boot IRQ" when the IRQ
1802 (Intel Bull Mountain technology) to generate random numbers.
/arch/arm/
DKconfig1925 Note that gcc does not generate 80-bit operations by default,
/arch/m68k/ifpsp060/src/
Dfplsp.S6707 # Notes: This will always generate one exception -- inexact. #
7604 # Huge*Huge to generate overflow and an infinity with #
7719 # sign(X)*Huge*Huge to generate overflow and an infinity with #
Dfpsp.S8982 # generate underflow by Tiny * Tiny. #