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Searched refs:irr (Results 1 – 17 of 17) sorted by relevance

/arch/arm/mach-sa1100/
Dneponset.c144 unsigned int irr; in neponset_irq_handler() local
157 irr = readb_relaxed(d->base + IRR); in neponset_irq_handler()
158 irr ^= IRR_ETHERNET | IRR_USAR; in neponset_irq_handler()
160 if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0) in neponset_irq_handler()
168 if (irr & (IRR_ETHERNET | IRR_USAR)) { in neponset_irq_handler()
179 if (irr & IRR_ETHERNET) in neponset_irq_handler()
182 if (irr & IRR_USAR) in neponset_irq_handler()
188 if (irr & IRR_SA1111) in neponset_irq_handler()
/arch/x86/kvm/
Di8259.c95 ret = !(s->irr & mask); in pic_set_irq1()
96 s->irr |= mask; in pic_set_irq1()
99 s->irr &= ~mask; in pic_set_irq1()
105 ret = !(s->irr & mask); in pic_set_irq1()
106 s->irr |= mask; in pic_set_irq1()
137 mask = s->irr & ~s->imr; in pic_get_irq()
224 s->irr &= ~(1 << irq); in pic_intack()
276 u8 edge_irr = s->irr & ~s->elcr; in kvm_pic_reset()
280 s->irr &= s->elcr; in kvm_pic_reset()
407 s->pics_state->pics[0].irr &= ~(1 << 2); in pic_poll_read()
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Dioapic.c219 ioapic->irr &= ~mask; in ioapic_set_irq()
250 old_irr = ioapic->irr; in ioapic_set_irq()
251 ioapic->irr |= mask; in ioapic_set_irq()
254 if (old_irr == ioapic->irr) { in ioapic_set_irq()
267 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr) in kvm_ioapic_inject_all() argument
272 for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS) in kvm_ioapic_inject_all()
373 && ioapic->irr & (1 << index)) in ioapic_write_indirect()
495 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr) in kvm_ioapic_eoi_inject_work()
528 if (!ent->fields.mask && (ioapic->irr & (1 << pin))) { in kvm_ioapic_update_eoi_one()
673 ioapic->irr = 0; in kvm_ioapic_reset()
[all …]
Dirq.h30 u8 irr; /* interrupt request register */ member
Dioapic.h78 u32 irr; member
/arch/ia64/include/asm/
Dprocessor.h545 unsigned long irr; in ia64_get_irr() local
548 case 0: irr = ia64_getreg(_IA64_REG_CR_IRR0); break; in ia64_get_irr()
549 case 1: irr = ia64_getreg(_IA64_REG_CR_IRR1); break; in ia64_get_irr()
550 case 2: irr = ia64_getreg(_IA64_REG_CR_IRR2); break; in ia64_get_irr()
551 case 3: irr = ia64_getreg(_IA64_REG_CR_IRR3); break; in ia64_get_irr()
554 return test_bit(bit, &irr); in ia64_get_irr()
/arch/x86/kernel/
Dirq.c335 unsigned int irr, vector; in fixup_irqs() local
362 irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); in fixup_irqs()
363 if (irr & (1 << (vector % 32))) { in fixup_irqs()
/arch/x86/include/asm/
Dapic.h451 u32 irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); in lapic_vector_set_in_irr() local
453 return !!(irr & (1U << (vector % 32))); in lapic_vector_set_in_irr()
Dio_apic.h66 irr : 1, member
Dapicdef.h269 } irr [8]; member
Dkvm_host.h1392 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
/arch/x86/include/uapi/asm/
Dkvm.h67 __u8 irr; /* interrupt request register */ member
89 __u32 irr; member
/arch/x86/kernel/apic/
Dapic.c1493 static bool apic_check_and_ack(union apic_ir *irr, union apic_ir *isr) in apic_check_and_ack() argument
1499 irr->regs[i] = apic_read(APIC_IRR + i * 0x10); in apic_check_and_ack()
1521 return !bitmap_empty(irr->map, APIC_IR_BITS); in apic_check_and_ack()
1540 union apic_ir irr, isr; in apic_pending_intr_clear() local
1545 if (!apic_check_and_ack(&irr, &isr)) in apic_pending_intr_clear()
1549 pr_warn("APIC: Stale IRR: %256pb ISR: %256pb\n", irr.map, isr.map); in apic_pending_intr_clear()
Dvector.c952 unsigned int irr, vector = apicd->prev_vector; in DEFINE_IDTENTRY_SYSVEC() local
963 irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); in DEFINE_IDTENTRY_SYSVEC()
964 if (irr & (1U << (vector % 32))) { in DEFINE_IDTENTRY_SYSVEC()
Dio_apic.c538 if (entry.irr) { in clear_IO_APIC_pin()
561 if (entry.irr) in clear_IO_APIC_pin()
1244 entry.vector, entry.irr, entry.delivery_status); in io_apic_print_entries()
1712 if (e.irr) { in io_apic_level_ack_pending()
1970 if (rentry.irr && rentry.is_level) { in ioapic_irq_get_chip_state()
/arch/x86/kvm/svm/
Dsvm.c3440 static void svm_update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr) in svm_update_cr8_intercept() argument
3456 if (irr == -1) in svm_update_cr8_intercept()
3459 if (tpr >= irr) in svm_update_cr8_intercept()
/arch/x86/kvm/vmx/
Dvmx.c6257 static void vmx_update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr) in vmx_update_cr8_intercept() argument
6266 tpr_threshold = (irr == -1 || tpr < irr) ? 0 : irr; in vmx_update_cr8_intercept()