| /arch/arm/mach-davinci/ |
| D | serial.c | 25 WARN_ONCE(!p->membase, "unmapped write: uart[%d]\n", offset); in serial_write_reg()
27 __raw_writel(value, p->membase + offset); in serial_write_reg()
79 if (!p->membase && p->mapbase) { in davinci_serial_init()
80 p->membase = ioremap(p->mapbase, SZ_4K); in davinci_serial_init()
82 if (p->membase) in davinci_serial_init()
88 if (p->membase && p->type != PORT_AR7) in davinci_serial_init()
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| /arch/mips/ralink/ |
| D | cevt-rt3352.c | 33 void __iomem *membase; member
49 count = ioread32(sdev->membase + SYSTICK_COUNT); in systick_next_event()
51 iowrite32(count, sdev->membase + SYSTICK_COMPARE); in systick_next_event()
94 iowrite32(0, systick.membase + SYSTICK_CONFIG); in systick_shutdown()
114 systick.membase + SYSTICK_CONFIG); in systick_set_oneshot()
123 systick.membase = of_iomap(np, 0); in ralink_systick_init()
124 if (!systick.membase) in ralink_systick_init()
139 ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name, in ralink_systick_init()
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| D | timer.c | 31 void __iomem *membase; member
39 __raw_writel(val, rt->membase + reg); in rt_timer_w32()
44 return __raw_readl(rt->membase + reg); in rt_timer_r32()
112 rt->membase = devm_ioremap_resource(&pdev->dev, res); in rt_timer_probe()
113 if (IS_ERR(rt->membase)) in rt_timer_probe()
114 return PTR_ERR(rt->membase); in rt_timer_probe()
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| D | bootrom.c | 13 static void __iomem *membase = (void __iomem *) KSEG1ADDR(BOOTROM_OFFSET);
17 seq_write(s, membase, BOOTROM_SIZE); in bootrom_show()
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| /arch/x86/platform/ce4100/ |
| D | ce4100.c | 39 return readl(p->membase + offset); in mem_serial_in()
58 ret = readl(p->membase + offset); in ce4100_mem_serial_in()
79 writel(value, p->membase + offset); in ce4100_mem_serial_out()
96 up->membase = in ce4100_serial_fixup()
98 up->membase += up->mapbase & ~PAGE_MASK; in ce4100_serial_fixup()
100 up->membase += port * 0x100; in ce4100_serial_fixup()
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| /arch/arm/plat-orion/include/plat/ |
| D | common.h | 18 void __init orion_uart0_init(void __iomem *membase,
23 void __init orion_uart1_init(void __iomem *membase,
28 void __init orion_uart2_init(void __iomem *membase,
33 void __init orion_uart3_init(void __iomem *membase,
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| /arch/arm/mach-omap1/ |
| D | serial.c | 35 return (unsigned int)__raw_readb(up->membase + offset); in omap_serial_in()
42 __raw_writeb(value, p->membase + offset); in omap_serial_outp()
126 serial_platform_data[i].membase = NULL; in omap_serial_init()
132 serial_platform_data[i].membase = in omap_serial_init()
134 if (!serial_platform_data[i].membase) { in omap_serial_init()
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| /arch/arm/kernel/ |
| D | isa.c | 60 register_isa_ports(unsigned int membase, unsigned int portbase, unsigned int portshift) in register_isa_ports() argument
62 isa_membase = membase; in register_isa_ports()
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| /arch/arm/plat-orion/ |
| D | common.c | 92 void __iomem *membase, in uart_complete() argument
98 data->membase = membase; in uart_complete()
126 void __init orion_uart0_init(void __iomem *membase, in orion_uart0_init() argument
132 membase, mapbase, irq, clk); in orion_uart0_init()
154 void __init orion_uart1_init(void __iomem *membase, in orion_uart1_init() argument
160 membase, mapbase, irq, clk); in orion_uart1_init()
182 void __init orion_uart2_init(void __iomem *membase, in orion_uart2_init() argument
188 membase, mapbase, irq, clk); in orion_uart2_init()
210 void __init orion_uart3_init(void __iomem *membase, in orion_uart3_init() argument
216 membase, mapbase, irq, clk); in orion_uart3_init()
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| /arch/mips/netlogic/xlr/ |
| D | platform.c | 32 uartbase = (uint64_t)(long)p->membase; in nlm_xlr_uart_in()
49 uartbase = (uint64_t)(long)p->membase; in nlm_xlr_uart_out()
92 xlr_uart_data[0].membase = (void __iomem *)uartbase; in nlm_uart_init()
96 xlr_uart_data[1].membase = (void __iomem *)uartbase; in nlm_uart_init()
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| /arch/mips/loongson2ef/common/ |
| D | serial.c | 36 .membase = (void __iomem *)NULL, \
67 uart8250_data[mips_machtype].membase = in serial_init()
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| /arch/mips/bcm47xx/ |
| D | serial.c | 42 p->membase = (void *)ssb_port->regs; in uart8250_init_ssb()
68 p->membase = (void *)bcma_port->regs; in uart8250_init_bcma()
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| /arch/mips/rb532/ |
| D | serial.c | 44 .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),
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| /arch/powerpc/boot/ |
| D | wrapper | 440 membase=`${CROSS}objdump -p "$kernel" | grep -m 1 LOAD | awk '{print $7}'`
445 ${MKIMAGE} -A ppc -O linux -T kernel -C $uboot_comp -a $membase -e $membase \
462 ${MKIMAGE} -A ppc -O linux -T multi -C gzip -a $membase -e $membase \
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| /arch/arm/mach-ixp4xx/ |
| D | gateway7001-setup.c | 61 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
|
| /arch/xtensa/platforms/xt2000/ |
| D | setup.c | 96 .membase = (void*)(_base), \
|
| /arch/m68k/include/asm/ |
| D | mcfuart.h | 21 void __iomem *membase; /* Virtual address if mapped */ member
|
| /arch/powerpc/kernel/ |
| D | legacy_serial.c | 62 tmp = readl(p->membase + (UART_IIR & ~3)); in tsi_serial_in()
65 return readb(p->membase + offset); in tsi_serial_in()
72 writeb(value, p->membase + offset); in tsi_serial_out()
547 port->membase = ioremap(port->mapbase, 0x100); in fixup_port_mmio()
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| /arch/mips/vr41xx/common/ |
| D | siu.c | 139 port.membase = (unsigned char __iomem *)KSEG1ADDR(res[i].start); in vr41xx_siu_setup()
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| /arch/arm/mach-iop32x/ |
| D | iq80321.c | 143 .membase = (char *)IQ80321_UART,
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| D | glantank.c | 138 .membase = (char *)GLANTANK_UART,
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| D | em7210.c | 152 .membase = (char *)IQ31244_UART,
|
| /arch/mips/jazz/ |
| D | setup.c | 101 .membase = (void *)(_base), \
|
| /arch/arm/mach-cns3xxx/ |
| D | cns3420vb.c | 93 .membase = (void __iomem *)CNS3XXX_UART0_BASE_VIRT, in cns3420_early_serial_setup()
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| /arch/arm/mach-pxa/ |
| D | zeus.c | 276 .membase = (void *)&FFUART,
285 .membase = (void *)&BTUART,
294 .membase = (void *)&STUART,
|