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Searched refs:mmid (Results 1 – 10 of 10) sorted by relevance

/arch/mips/mm/
Dcontext.c66 u64 mmid; in flush_context() local
76 mmid = xchg_relaxed(&cpu_data[cpu].asid_cache, 0); in flush_context()
85 if (mmid == 0) in flush_context()
86 mmid = per_cpu(reserved_mmids, cpu); in flush_context()
88 __set_bit(mmid & cpu_asid_mask(&cpu_data[cpu]), mmid_map); in flush_context()
89 per_cpu(reserved_mmids, cpu) = mmid; in flush_context()
99 static bool check_update_reserved_mmid(u64 mmid, u64 newmmid) in check_update_reserved_mmid() argument
115 if (per_cpu(reserved_mmids, cpu) == mmid) { in check_update_reserved_mmid()
127 u64 mmid, version, mmid_mask; in get_new_mmid() local
129 mmid = cpu_context(0, mm); in get_new_mmid()
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/arch/mips/lib/
Ddump_tlb.c76 unsigned long s_entryhi, entryhi, asid, mmid; in dump_tlb() local
116 mmid = read_c0_memorymapid(); in dump_tlb()
118 mmid = entryhi & asidmask; in dump_tlb()
139 if (!((entrylo0 | entrylo1) & ENTRYLO_G) && (mmid != asid)) in dump_tlb()
152 asidwidth, mmid); in dump_tlb()
/arch/mips/include/asm/
Dmmu.h12 atomic64_t mmid; member
Dmmu_context.h109 return atomic64_read(&mm->context.mmid); in cpu_context()
118 atomic64_set(&mm->context.mmid, ctx); in set_cpu_context()
/arch/arm/mm/
Dtlb-v7.S34 mmid r3, r3 @ get vm_mm->context.id
Dtlb-v6.S36 mmid r3, r3 @ get vm_mm->context.id
Dproc-v7-3level.S47 mmid r2, r2
Dproc-v7-2level.S43 mmid r1, r1 @ get mm->context.id
Dproc-v6.S99 mmid r1, r1 @ get mm->context.id
Dproc-macros.S45 .macro mmid, rd, rn macro