Searched refs:refresh (Results 1 – 25 of 28) sorted by relevance
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| /arch/arm/mach-s3c/ |
| D | cpufreq-utils-s3c24xx.c | 32 unsigned long refresh; in s3c2410_cpufreq_setrefresh() local
42 refresh = (cfg->freq.hclk / 100) * (board->refresh / 10); in s3c2410_cpufreq_setrefresh()
43 refresh = DIV_ROUND_UP(refresh, (1000 * 1000)); /* apply scale */ in s3c2410_cpufreq_setrefresh()
44 refresh = (1 << 11) + 1 - refresh; in s3c2410_cpufreq_setrefresh()
46 s3c_freq_dbg("%s: refresh value %lu\n", __func__, refresh); in s3c2410_cpufreq_setrefresh()
50 refval |= refresh; in s3c2410_cpufreq_setrefresh()
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| D | iotiming-s3c2412.c | 260 u32 refresh; in s3c2412_cpufreq_setrefresh() local
271 refresh = (cfg->freq.hclk / 100) * (board->refresh / 10); in s3c2412_cpufreq_setrefresh()
272 refresh = DIV_ROUND_UP(refresh, (1000 * 1000)); /* apply scale */ in s3c2412_cpufreq_setrefresh()
273 refresh &= ((1 << 16) - 1); in s3c2412_cpufreq_setrefresh()
275 s3c_freq_dbg("%s: refresh value %u\n", __func__, (unsigned int)refresh); in s3c2412_cpufreq_setrefresh()
277 __raw_writel(refresh, S3C2412_REFRESH); in s3c2412_cpufreq_setrefresh()
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| D | mach-smartq5.c | 120 .refresh = 80,
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| D | mach-smartq7.c | 136 .refresh = 80,
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| D | mach-mini2440.c | 106 _yres, margin_top, margin_bottom, vsync, refresh) \ argument
118 ((refresh) * \
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| D | mach-osiris.c | 348 .refresh = 7800, /* refresh period is 7.8usec */
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| D | mach-bast.c | 534 .refresh = 7800, /* 7.8usec */
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| /arch/arm/mach-pxa/ |
| D | sleep.S | 54 @ prepare SDRAM refresh settings
58 @ enable SDRAM self-refresh mode
95 @ prepare SDRAM refresh settings
99 @ enable SDRAM self-refresh mode
107 @ as possible to eliminate messing about with the refresh clock
159 @ external accesses after SDRAM is put in self-refresh mode
160 @ (see Errata 38 ...hangs when entering self-refresh mode)
165 @ put SDRAM into self-refresh
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| /arch/arm/mach-omap2/ |
| D | sleep24xx.S | 59 orr r4, r4, #0x40 @ enable self refresh on idle req
70 bic r4, r4, #0x40 @ now clear self refresh bit.
74 nop @ start auto refresh only after clk ok
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| D | sram243x.S | 141 ldr r6, omap243x_srs_sdrc_rfr_ctrl @ get addr of refresh reg
286 str r1, [r4] @ update refresh timing
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| D | sram242x.S | 141 ldr r6, omap242x_srs_sdrc_rfr_ctrl @ get addr of refresh reg
286 str r1, [r4] @ update refresh timing
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| D | sleep34xx.S | 208 orr r5, r5, #0x40 @ enable self refresh on idle req
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| /arch/arm/mach-socfpga/ |
| D | Makefile | 8 obj-$(CONFIG_SOCFPGA_SUSPEND) += pm.o self-refresh.o
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| /arch/sh/boards/mach-hp6xx/ |
| D | pm_wakeup.S | 24 ! enable refresh
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| /arch/arm/mach-omap1/ |
| D | sleep.S | 81 @ prepare to put SDRAM into self-refresh manually
166 @ prepare to put SDRAM into self-refresh manually
236 @ Prepare to put SDRAM into self-refresh manually
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| /arch/sh/boards/mach-sh7763rdp/ |
| D | setup.c | 109 .refresh = 60,
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| /arch/s390/include/asm/ |
| D | pci_clp.h | 155 u8 refresh : 1; /* TLB refresh mode */ member
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| /arch/arm/mach-mmp/ |
| D | aspenite.c | 184 .refresh = 60,
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| /arch/arm/mach-sa1100/ |
| D | sleep.S | 133 @ Step 5 clear DRAM refresh control register
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| /arch/arm/mach-tegra/ |
| D | sleep-tegra20.S | 241 str r1, [r0, #EMC_SELF_REF] @ take DRAM out of self refresh
368 bne emcself @ loop until DDR in self-refresh
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| D | sleep-tegra30.S | 505 str r1, [r0, #EMC_SELF_REF] @ take DRAM out of self refresh
862 bne emcself @ loop until DDR in self-refresh
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| /arch/x86/kvm/ |
| D | pmu.h | 38 void (*refresh)(struct kvm_vcpu *vcpu); member
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| D | pmu.c | 419 kvm_x86_ops.pmu_ops->refresh(vcpu); in kvm_pmu_refresh()
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| /arch/x86/kvm/svm/ |
| D | pmu.c | 355 .refresh = amd_pmu_refresh,
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| /arch/s390/pci/ |
| D | pci_clp.c | 102 zdev->tlb_refresh = response->refresh; in clp_store_query_pci_fngrp()
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