Searched refs:rsr (Results 1 – 15 of 15) sorted by relevance
| /arch/xtensa/kernel/ |
| D | entry.S | 82 rsr \flags, ps
89 rsr \flags, ps
135 rsr a0, depc
148 rsr a3, sar
161 rsr a2, windowbase
162 rsr a3, windowstart
233 rsr a2, sar # original WINDOWBASE
281 rsr a0, depc # get a2
293 rsr a3, sar
301 rsr a2, windowbase # don't need to save these, we only
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| D | vectors.S | 78 rsr a0, exccause # retrieve exception cause
105 rsr a0, exccause # retrieve exception cause
217 rsr a2, ps
261 rsr a0, ps
271 rsr a0, exccause
288 rsr a3, exccause
307 rsr a3, excsave1
340 rsr a0, exccause
426 rsr a0, ps
428 rsr a2, windowbase
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| D | align.S | 171 rsr a0, depc
175 rsr a3, excsave1
181 rsr a0, sar
182 rsr a8, excvaddr # load unaligned memory address
201 rsr a7, epc1 # load exception address
322 rsr a3, excsave1
335 rsr a0, ps
410 rsr a4, lend # check if we reached LEND
412 rsr a4, lcount # and LCOUNT != 0
415 rsr a7, lbeg # set PC to LBEGIN
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| D | coprocessor.S | 121 rsr a3, sar
125 rsr a2, depc
138 rsr a3, exccause
145 rsr a0, cpenable
180 2: rsr a3, exccause
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| D | head.S | 86 rsr a2, excsave1
206 rsr a2, prid
325 rsr a0, prid
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| /arch/xtensa/variants/dc232b/include/variant/ |
| D | tie-asm.h | 41 rsr \at1, ACCLO // MAC16 accumulator
42 rsr \at2, ACCHI
49 rsr \at1, M0 // MAC16 registers
50 rsr \at2, M1
53 rsr \at1, M2
54 rsr \at2, M3
61 rsr \at1, SCOMPARE1 // conditional store option
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| /arch/xtensa/variants/de212/include/variant/ |
| D | tie-asm.h | 81 rsr.ACCLO \at1 // MAC16 option
83 rsr.ACCHI \at1 // MAC16 option
93 rsr.SCOMPARE1 \at1 // conditional store option
95 rsr.M0 \at1 // MAC16 option
97 rsr.M1 \at1 // MAC16 option
99 rsr.M2 \at1 // MAC16 option
101 rsr.M3 \at1 // MAC16 option
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| /arch/xtensa/variants/csp/include/variant/ |
| D | tie-asm.h | 91 rsr.ACCLO \at1 // MAC16 option
93 rsr.ACCHI \at1 // MAC16 option
103 rsr.BR \at1 // boolean option
105 rsr.SCOMPARE1 \at1 // conditional store option
107 rsr.M0 \at1 // MAC16 option
109 rsr.M1 \at1 // MAC16 option
111 rsr.M2 \at1 // MAC16 option
113 rsr.M3 \at1 // MAC16 option
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| /arch/xtensa/variants/dc233c/include/variant/ |
| D | tie-asm.h | 92 rsr \at1, ACCLO // MAC16 option
94 rsr \at1, ACCHI // MAC16 option
104 rsr \at1, M0 // MAC16 option
106 rsr \at1, M1 // MAC16 option
108 rsr \at1, M2 // MAC16 option
110 rsr \at1, M3 // MAC16 option
112 rsr \at1, SCOMPARE1 // conditional store option
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| /arch/xtensa/variants/test_kc705_be/include/variant/ |
| D | tie-asm.h | 91 rsr.ACCLO \at1 // MAC16 option
93 rsr.ACCHI \at1 // MAC16 option
103 rsr.BR \at1 // boolean option
105 rsr.SCOMPARE1 \at1 // conditional store option
107 rsr.M0 \at1 // MAC16 option
109 rsr.M1 \at1 // MAC16 option
111 rsr.M2 \at1 // MAC16 option
113 rsr.M3 \at1 // MAC16 option
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| /arch/xtensa/variants/test_kc705_hifi/include/variant/ |
| D | tie-asm.h | 92 rsr.ACCLO \at1 // MAC16 option
94 rsr.ACCHI \at1 // MAC16 option
104 rsr.M0 \at1 // MAC16 option
106 rsr.M1 \at1 // MAC16 option
108 rsr.M2 \at1 // MAC16 option
110 rsr.M3 \at1 // MAC16 option
112 rsr.BR \at1 // boolean option
114 rsr.SCOMPARE1 \at1 // conditional store option
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| /arch/powerpc/include/asm/ |
| D | mpc5121.h | 15 u32 rsr; /* Reset Status Register */ member
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| /arch/xtensa/variants/test_mmuhifi_c3/include/variant/ |
| D | tie-asm.h | 40 rsr \at1, BR // boolean option
46 rsr \at1, SCOMPARE1 // conditional store option
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| /arch/arm/mm/ |
| D | pmsa-v7.c | 113 u32 rsr = readl_relaxed(BASEADDR_V7M_SCB + PMSAv7_RASR) & GENMASK(15, 0); in dracr_write() local
115 writel_relaxed((v << 16) | rsr, BASEADDR_V7M_SCB + PMSAv7_RASR); in dracr_write()
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| /arch/xtensa/boot/boot-redboot/ |
| D | bootstrap.S | 59 rsr a5, windowbase
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