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Searched refs:scale (Results 1 – 25 of 30) sorted by relevance

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/arch/arm64/include/asm/
Dtlbflush.h136 #define __TLBI_VADDR_RANGE(addr, asid, scale, num, ttl) \ argument
142 __ta |= (unsigned long)(scale) << 44; \
149 #define __TLBI_RANGE_PAGES(num, scale) \ argument
150 ((unsigned long)((num) + 1) << (5 * (scale) + 1))
158 #define __TLBI_RANGE_NUM(pages, scale) \ argument
159 ((((pages) >> (5 * (scale) + 1)) & TLBI_RANGE_MASK) - 1)
287 int scale = 0; in __flush_tlb_range() local
344 num = __TLBI_RANGE_NUM(pages, scale); in __flush_tlb_range()
346 addr = __TLBI_VADDR_RANGE(start, asid, scale, in __flush_tlb_range()
355 start += __TLBI_RANGE_PAGES(num, scale) << PAGE_SHIFT; in __flush_tlb_range()
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/arch/arm64/kernel/
Dtopology.c167 u64 core_cnt, const_cnt, scale; in amu_scale_freq_tick() local
194 scale = core_cnt - prev_core_cnt; in amu_scale_freq_tick()
195 scale *= this_cpu_read(arch_max_freq_scale); in amu_scale_freq_tick()
196 scale = div64_u64(scale >> SCHED_CAPACITY_SHIFT, in amu_scale_freq_tick()
199 scale = min_t(unsigned long, scale, SCHED_CAPACITY_SCALE); in amu_scale_freq_tick()
200 this_cpu_write(arch_freq_scale, (unsigned long)scale); in amu_scale_freq_tick()
/arch/arm/mach-omap2/
Dvoltage.c81 if (!voltdm->scale) { in voltdm_scale()
107 ret = voltdm->scale(voltdm, volt); in voltdm_scale()
262 voltdm->scale = omap_vc_bypass_scale; in omap_voltage_late_init()
267 voltdm->scale = omap_vp_forceupdate_scale; in omap_voltage_late_init()
Dvoltage.h83 int (*scale) (struct voltagedomain *voltdm, member
/arch/mips/alchemy/common/
Dclock.c377 int scale, int maxdiv, unsigned long *rv) in alchemy_calc_div() argument
385 if (scale == 2) { /* only div-by-multiple-of-2 possible */ in alchemy_calc_div()
390 div2 = (div1 / scale) - 1; /* value to write to register */ in alchemy_calc_div()
397 div1 = ((div2 + 1) * scale); in alchemy_calc_div()
403 int scale, int maxdiv) in alchemy_clk_fgcs_detr() argument
437 tdv = alchemy_calc_div(req->rate, pr, scale, maxdiv, NULL); in alchemy_clk_fgcs_detr()
458 for (j = (maxdiv == 4) ? 1 : scale; j <= maxdiv; j += scale) { in alchemy_clk_fgcs_detr()
464 tdv = alchemy_calc_div(req->rate, pr, scale, maxdiv, in alchemy_clk_fgcs_detr()
713 int scale, maxdiv; in alchemy_clk_fgv2_detr() local
716 scale = 1; in alchemy_clk_fgv2_detr()
[all …]
/arch/powerpc/kernel/
Dvecemu.c157 static int ctsxs(unsigned int x, int scale, unsigned int *vscrp) in ctsxs() argument
165 exp = exp - 127 + scale; in ctsxs()
170 if (x + (scale << 23) != 0xcf000000) in ctsxs()
179 static unsigned int ctuxs(unsigned int x, int scale, unsigned int *vscrp) in ctuxs() argument
188 exp = exp - 127 + scale; in ctuxs()
Dtime.c953 u64 scale; in time_init() local
979 scale = res.result_low; in time_init()
981 scale = (scale >> 1) | (res.result_high << 63); in time_init()
984 tb_to_ns_scale = scale; in time_init()
/arch/m68k/math-emu/
Dfp_arith.c656 int scale, oldround; in fp_fscale() local
683 scale = fp_conv_ext2long(src); in fp_fscale()
687 scale += dest->exp; in fp_fscale()
689 if (scale >= 0x7fff) { in fp_fscale()
691 } else if (scale <= 0) { in fp_fscale()
693 fp_denormalize(dest, -scale); in fp_fscale()
695 dest->exp = scale; in fp_fscale()
Dfp_decode.h157 move.w %d2,%d1 | scale factor
/arch/x86/events/intel/
Duncore_snbep.c739 INTEL_UNCORE_EVENT_DESC(cas_count_read.scale, "6.103515625e-5"),
742 INTEL_UNCORE_EVENT_DESC(cas_count_write.scale, "6.103515625e-5"),
2924 INTEL_UNCORE_EVENT_DESC(cas_count_read.scale, "6.103515625e-5"),
2927 INTEL_UNCORE_EVENT_DESC(cas_count_write.scale, "6.103515625e-5"),
3940 INTEL_UNCORE_EVENT_DESC(bw_in_port0.scale, "3.814697266e-6"),
3943 INTEL_UNCORE_EVENT_DESC(bw_in_port1.scale, "3.814697266e-6"),
3946 INTEL_UNCORE_EVENT_DESC(bw_in_port2.scale, "3.814697266e-6"),
3949 INTEL_UNCORE_EVENT_DESC(bw_in_port3.scale, "3.814697266e-6"),
3952 INTEL_UNCORE_EVENT_DESC(bw_out_port0.scale, "3.814697266e-6"),
3955 INTEL_UNCORE_EVENT_DESC(bw_out_port1.scale, "3.814697266e-6"),
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Duncore_snb.c554 INTEL_UNCORE_EVENT_DESC(data_reads.scale, "6.103515625e-5"),
558 INTEL_UNCORE_EVENT_DESC(data_writes.scale, "6.103515625e-5"),
562 INTEL_UNCORE_EVENT_DESC(gt_requests.scale, "6.103515625e-5"),
566 INTEL_UNCORE_EVENT_DESC(ia_requests.scale, "6.103515625e-5"),
570 INTEL_UNCORE_EVENT_DESC(io_requests.scale, "6.103515625e-5"),
1377 INTEL_UNCORE_EVENT_DESC(data_total.scale, "6.103515625e-5"),
1381 INTEL_UNCORE_EVENT_DESC(data_read.scale, "6.103515625e-5"),
1385 INTEL_UNCORE_EVENT_DESC(data_write.scale, "6.103515625e-5"),
/arch/m68k/fpsp040/
DMakefile9 smovecr.o srem_mod.o scale.o \
Dscale.S2 | scale.sa 3.3 7/30/91
15 | Output: The function returns scale(X,Y) to fp0.
Dgen_except.S245 | Only scosh, setox, ssinh, stwotox, and scale can set overflow in
248 | Stwotox, setox, and scale can set underflow in this manner.
/arch/powerpc/include/asm/
Dimc-pmu.h56 char *scale; member
/arch/arm64/boot/dts/nvidia/
Dtegra210-p3450-0000.dts271 regulator-ramp-delay-scale = <300>;
287 regulator-ramp-delay-scale = <300>;
303 regulator-ramp-delay-scale = <350>;
319 regulator-ramp-delay-scale = <360>;
335 regulator-ramp-delay-scale = <200>;
351 regulator-ramp-delay-scale = <200>;
365 regulator-ramp-delay-scale = <200>;
383 regulator-ramp-delay-scale = <200>;
408 regulator-ramp-delay-scale = <200>;
422 regulator-ramp-delay-scale = <200>;
/arch/sparc/kernel/
Dvisemul.c480 unsigned long rs1, rs2, gsr, scale, rd_val; in pformat() local
483 scale = (gsr >> 3) & (opf == FPACK16_OPF ? 0xf : 0x1f); in pformat()
493 int scaled = src << scale; in pformat()
516 s64 scaled = src << scale; in pformat()
539 s64 scaled = src << scale; in pformat()
/arch/x86/events/
Drapl.c412 RAPL_EVENT_ATTR_STR(energy-cores.scale, rapl_cores_scale, "2.3283064365386962890625e-10");
413 RAPL_EVENT_ATTR_STR(energy-pkg.scale, rapl_pkg_scale, "2.3283064365386962890625e-10");
414 RAPL_EVENT_ATTR_STR(energy-ram.scale, rapl_ram_scale, "2.3283064365386962890625e-10");
415 RAPL_EVENT_ATTR_STR(energy-gpu.scale, rapl_gpu_scale, "2.3283064365386962890625e-10");
416 RAPL_EVENT_ATTR_STR(energy-psys.scale, rapl_psys_scale, "2.3283064365386962890625e-10");
/arch/powerpc/perf/
Dimc-pmu.c151 static int imc_parse_event(struct device_node *np, const char *scale, in imc_parse_event() argument
171 s = scale; in imc_parse_event()
174 event->scale = kstrdup(s, GFP_KERNEL); in imc_parse_event()
175 if (!event->scale) in imc_parse_event()
191 kfree(event->scale); in imc_parse_event()
209 kfree(events[i].scale); in imc_free_events()
302 if (pmu->events[i].scale) { in update_events_in_group()
306 dev_str = device_str_attr_create(ev_scale_str, pmu->events[i].scale); in update_events_in_group()
/arch/m68k/ifpsp060/src/
Dfpsp.S9573 # fp0 = scale(X,Y) #
10166 # Entry point for scale w/ extended denorm. The function does
10269 # - t_ovfl_sc() is provided for scale() which only sets #
11528 # scale_to_zero_src() - scale src exponent to zero #
11529 # scale_to_zero_dst() - scale dst exponent to zero #
11547 # For norms/denorms, scale the exponents such that a multiply #
11642 sub.l %d0,%d1 # add scale factor
12025 # scale_to_zero_src() - scale src exponent to zero #
12043 # sgl/dbl, must scale exponent and perform an "fmove". Check to see #
12284 sub.l %d0,%d1 # add scale factor
[all …]
Disp.S1358 andi.l &0x3,%d2 # extract scale value
1360 lsl.l %d2,%d1 # shift index by scale
/arch/x86/events/amd/
Dpower.c172 EVENT_ATTR_STR(power-pkg.scale, power_pkg_scale, "1.000000e-3");
/arch/arm/boot/dts/
Dnspire.dtsi100 * There is some code to scale the clock down by a factor
/arch/arm/mach-imx/
Dmmdc.c91 PMU_EVENT_ATTR_STRING(read-bytes.scale, mmdc_pmu_read_bytes_scale, "0.000001");
94 PMU_EVENT_ATTR_STRING(write-bytes.scale, mmdc_pmu_write_bytes_scale, "0.000001");
/arch/x86/math-emu/
Dfpu_trig.c1495 long scale; in fscale() local
1522 scale = signnegative(st1_ptr) ? -tmp.sigl : tmp.sigl; in fscale()
1523 scale += exponent16(st0_ptr); in fscale()
1525 setexponent16(st0_ptr, scale); in fscale()

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