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/arch/arm/boot/dts/
Dsama5d3xmb_gmac.dtsi21 txen-skew-ps = <800>;
22 txc-skew-ps = <3000>;
23 rxdv-skew-ps = <400>;
24 rxc-skew-ps = <3000>;
25 rxd0-skew-ps = <400>;
26 rxd1-skew-ps = <400>;
27 rxd2-skew-ps = <400>;
28 rxd3-skew-ps = <400>;
35 txen-skew-ps = <800>;
36 txc-skew-ps = <3000>;
[all …]
Dsocfpga_cyclone5_de0_nano_soc.dts48 txd0-skew-ps = <0>; /* -420ps */
49 txd1-skew-ps = <0>; /* -420ps */
50 txd2-skew-ps = <0>; /* -420ps */
51 txd3-skew-ps = <0>; /* -420ps */
52 rxd0-skew-ps = <420>; /* 0ps */
53 rxd1-skew-ps = <420>; /* 0ps */
54 rxd2-skew-ps = <420>; /* 0ps */
55 rxd3-skew-ps = <420>; /* 0ps */
56 txen-skew-ps = <0>; /* -420ps */
57 txc-skew-ps = <1860>; /* 960ps */
[all …]
Dsama5d3xcm_cmp.dtsi56 txen-skew-ps = <800>;
57 txc-skew-ps = <3000>;
58 rxdv-skew-ps = <400>;
59 rxc-skew-ps = <3000>;
60 rxd0-skew-ps = <400>;
61 rxd1-skew-ps = <400>;
62 rxd2-skew-ps = <400>;
63 rxd3-skew-ps = <400>;
70 txen-skew-ps = <800>;
71 txc-skew-ps = <3000>;
[all …]
Dsocfpga_arria10_socdk.dtsi77 * All skews are offset since hardware skew values for the ksz9031
78 * range from a negative skew to a positive skew.
81 txd0-skew-ps = <0>; /* -420ps */
82 txd1-skew-ps = <0>; /* -420ps */
83 txd2-skew-ps = <0>; /* -420ps */
84 txd3-skew-ps = <0>; /* -420ps */
85 rxd0-skew-ps = <420>; /* 0ps */
86 rxd1-skew-ps = <420>; /* 0ps */
87 rxd2-skew-ps = <420>; /* 0ps */
88 rxd3-skew-ps = <420>; /* 0ps */
[all …]
Dat91-dvk_su60_somc.dtsi123 txen-skew-ps = <800>;
124 txc-skew-ps = <3000>;
125 rxdv-skew-ps = <400>;
126 rxc-skew-ps = <3000>;
127 rxd0-skew-ps = <400>;
128 rxd1-skew-ps = <400>;
129 rxd2-skew-ps = <400>;
130 rxd3-skew-ps = <400>;
Dsocfpga_cyclone5_sodia.dts71 rxd0-skew-ps = <0>;
72 rxd1-skew-ps = <0>;
73 rxd2-skew-ps = <0>;
74 rxd3-skew-ps = <0>;
75 rxdv-skew-ps = <0>;
76 rxc-skew-ps = <3000>;
77 txen-skew-ps = <0>;
78 txc-skew-ps = <3000>;
Dsocfpga_cyclone5_vining_fpga.dts95 rxd0-skew-ps = <0>;
96 rxd1-skew-ps = <0>;
97 rxd2-skew-ps = <0>;
98 rxd3-skew-ps = <0>;
99 txd0-skew-ps = <0>;
100 txd1-skew-ps = <0>;
101 txd2-skew-ps = <0>;
102 txd3-skew-ps = <0>;
103 txen-skew-ps = <0>;
104 txc-skew-ps = <1860>;
[all …]
Dsocfpga_arria5_socdk.dts65 rxd0-skew-ps = <0>;
66 rxd1-skew-ps = <0>;
67 rxd2-skew-ps = <0>;
68 rxd3-skew-ps = <0>;
69 txen-skew-ps = <0>;
70 txc-skew-ps = <2600>;
71 rxdv-skew-ps = <0>;
72 rxc-skew-ps = <2000>;
Dsocfpga_cyclone5_socdk.dts69 rxd0-skew-ps = <0>;
70 rxd1-skew-ps = <0>;
71 rxd2-skew-ps = <0>;
72 rxd3-skew-ps = <0>;
73 txen-skew-ps = <0>;
74 txc-skew-ps = <2600>;
75 rxdv-skew-ps = <0>;
76 rxc-skew-ps = <2000>;
Dsocfpga_cyclone5_sockit.dts126 rxd0-skew-ps = <0>;
127 rxd1-skew-ps = <0>;
128 rxd2-skew-ps = <0>;
129 rxd3-skew-ps = <0>;
130 txen-skew-ps = <0>;
131 txc-skew-ps = <2600>;
132 rxdv-skew-ps = <0>;
133 rxc-skew-ps = <2000>;
Dgemini-sl93512r.dts187 /* Control pad skew comes from sl_switch.c in the vendor code */
190 skew-delay = <5>;
194 skew-delay = <7>;
198 skew-delay = <8>;
202 skew-delay = <7>;
206 skew-delay = <10>;
210 skew-delay = <7>; /* 5 at another place? */
214 skew-delay = <15>;
218 skew-delay = <0>;
221 /* The data lines all have default skew */
[all …]
Dimx6qdl-dhcom-pdk2.dtsi204 rxc-skew-ps = <3000>;
205 rxd0-skew-ps = <0>;
206 rxd1-skew-ps = <0>;
207 rxd2-skew-ps = <0>;
208 rxd3-skew-ps = <0>;
209 rxdv-skew-ps = <0>;
210 txc-skew-ps = <3000>;
211 txd0-skew-ps = <0>;
212 txd1-skew-ps = <0>;
213 txd2-skew-ps = <0>;
[all …]
Dgemini-nas4220b.dts111 skew-delay = <0>;
115 skew-delay = <15>;
119 skew-delay = <7>;
123 skew-delay = <11>;
127 skew-delay = <10>;
130 /* The data lines all have default skew */
139 skew-delay = <7>;
Dgemini-sq201.dts186 skew-delay = <0>;
190 skew-delay = <15>;
194 skew-delay = <7>;
198 skew-delay = <10>;
202 skew-delay = <7>;
206 skew-delay = <8>;
210 skew-delay = <7>;
214 skew-delay = <5>;
217 /* The data lines all have default skew */
226 skew-delay = <7>;
Dimx6qdl-icore-rqs.dtsi174 rxc-skew-ps = <1140>;
175 txc-skew-ps = <1140>;
176 txen-skew-ps = <600>;
177 rxdv-skew-ps = <240>;
178 rxd0-skew-ps = <420>;
179 rxd1-skew-ps = <600>;
180 rxd2-skew-ps = <420>;
181 rxd3-skew-ps = <240>;
182 txd0-skew-ps = <60>;
183 txd1-skew-ps = <60>;
[all …]
Dstm32mp15xx-dhcor-avenger96.dtsi149 rxc-skew-ps = <1500>;
150 rxdv-skew-ps = <540>;
151 rxd0-skew-ps = <420>;
152 rxd1-skew-ps = <420>;
153 rxd2-skew-ps = <420>;
154 rxd3-skew-ps = <420>;
156 txc-skew-ps = <1440>;
157 txen-skew-ps = <540>;
158 txd0-skew-ps = <420>;
159 txd1-skew-ps = <420>;
[all …]
Dimx6qdl-nit6xlite.dtsi206 txen-skew-ps = <0>;
207 txc-skew-ps = <3000>;
208 rxdv-skew-ps = <0>;
209 rxc-skew-ps = <3000>;
210 rxd0-skew-ps = <0>;
211 rxd1-skew-ps = <0>;
212 rxd2-skew-ps = <0>;
213 rxd3-skew-ps = <0>;
214 txd0-skew-ps = <0>;
215 txd1-skew-ps = <0>;
[all …]
Dgemini-dlink-dns-313.dts229 skew-delay = <0>;
233 skew-delay = <10>;
237 skew-delay = <15>;
241 skew-delay = <7>;
245 skew-delay = <10>;
248 /* The data lines all have default skew */
255 skew-delay = <7>;
260 skew-delay = <5>;
Dimx6qdl-nitrogen6x.dtsi281 txen-skew-ps = <0>;
282 txc-skew-ps = <3000>;
283 rxdv-skew-ps = <0>;
284 rxc-skew-ps = <3000>;
285 rxd0-skew-ps = <0>;
286 rxd1-skew-ps = <0>;
287 rxd2-skew-ps = <0>;
288 rxd3-skew-ps = <0>;
289 txd0-skew-ps = <0>;
290 txd1-skew-ps = <0>;
[all …]
Dimx6qdl-emcon.dtsi199 rxdv-skew-ps = <480>;
200 txen-skew-ps = <480>;
201 rxd0-skew-ps = <480>;
202 rxd1-skew-ps = <480>;
203 rxd2-skew-ps = <480>;
204 rxd3-skew-ps = <480>;
205 txd0-skew-ps = <420>;
206 txd1-skew-ps = <420>;
207 txd2-skew-ps = <360>;
208 txd3-skew-ps = <360>;
[all …]
Dimx6qdl-nitrogen6_max.dtsi348 txen-skew-ps = <0>;
349 txc-skew-ps = <3000>;
350 rxdv-skew-ps = <0>;
351 rxc-skew-ps = <3000>;
352 rxd0-skew-ps = <0>;
353 rxd1-skew-ps = <0>;
354 rxd2-skew-ps = <0>;
355 rxd3-skew-ps = <0>;
356 txd0-skew-ps = <0>;
357 txd1-skew-ps = <0>;
[all …]
/arch/arm64/boot/dts/intel/
Dsocfpga_agilex_socdk_nand.dts64 txd0-skew-ps = <0>; /* -420ps */
65 txd1-skew-ps = <0>; /* -420ps */
66 txd2-skew-ps = <0>; /* -420ps */
67 txd3-skew-ps = <0>; /* -420ps */
68 rxd0-skew-ps = <420>; /* 0ps */
69 rxd1-skew-ps = <420>; /* 0ps */
70 rxd2-skew-ps = <420>; /* 0ps */
71 rxd3-skew-ps = <420>; /* 0ps */
72 txen-skew-ps = <0>; /* -420ps */
73 txc-skew-ps = <900>; /* 0ps */
[all …]
Dsocfpga_agilex_socdk.dts64 txd0-skew-ps = <0>; /* -420ps */
65 txd1-skew-ps = <0>; /* -420ps */
66 txd2-skew-ps = <0>; /* -420ps */
67 txd3-skew-ps = <0>; /* -420ps */
68 rxd0-skew-ps = <420>; /* 0ps */
69 rxd1-skew-ps = <420>; /* 0ps */
70 rxd2-skew-ps = <420>; /* 0ps */
71 rxd3-skew-ps = <420>; /* 0ps */
72 txen-skew-ps = <0>; /* -420ps */
73 txc-skew-ps = <900>; /* 0ps */
[all …]
/arch/arm64/boot/dts/altera/
Dsocfpga_stratix10_socdk.dts91 txd0-skew-ps = <0>; /* -420ps */
92 txd1-skew-ps = <0>; /* -420ps */
93 txd2-skew-ps = <0>; /* -420ps */
94 txd3-skew-ps = <0>; /* -420ps */
95 rxd0-skew-ps = <420>; /* 0ps */
96 rxd1-skew-ps = <420>; /* 0ps */
97 rxd2-skew-ps = <420>; /* 0ps */
98 rxd3-skew-ps = <420>; /* 0ps */
99 txen-skew-ps = <0>; /* -420ps */
100 txc-skew-ps = <900>; /* 0ps */
[all …]
Dsocfpga_stratix10_socdk_nand.dts91 txd0-skew-ps = <0>; /* -420ps */
92 txd1-skew-ps = <0>; /* -420ps */
93 txd2-skew-ps = <0>; /* -420ps */
94 txd3-skew-ps = <0>; /* -420ps */
95 rxd0-skew-ps = <420>; /* 0ps */
96 rxd1-skew-ps = <420>; /* 0ps */
97 rxd2-skew-ps = <420>; /* 0ps */
98 rxd3-skew-ps = <420>; /* 0ps */
99 txen-skew-ps = <0>; /* -420ps */
100 txc-skew-ps = <900>; /* 0ps */
[all …]

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