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Searched refs:sr1 (Results 1 – 16 of 16) sorted by relevance

/arch/parisc/kernel/
Dpacache.S79 mtsp %r20, %sr1
85 pitlbe %r0(%sr1, %r28)
86 pitlbe,m %arg1(%sr1, %r28) /* Last pitlbe and addr adjust */
94 mtsp %r20, %sr1
100 pitlbe,m %arg1(%sr1, %r28) /* pitlbe for one loop */
123 mtsp %r20, %sr1
129 pdtlbe %r0(%sr1, %r28)
130 pdtlbe,m %arg1(%sr1, %r28) /* Last pdtlbe and addr adjust */
138 mtsp %r20, %sr1
144 pdtlbe,m %arg1(%sr1, %r28) /* pdtlbe for one loop */
[all …]
Dentry.S1212 mfsp %sr1,t1 /* Save sr1 so we can use it in tlb inserts */
1213 mtsp spc,%sr1
1215 idtlba pte,(%sr1,va)
1216 idtlbp prot,(%sr1,va)
1218 mtsp t1, %sr1 /* Restore sr1 */
1245 mfsp %sr1,t1 /* Save sr1 so we can use it in tlb inserts */
1246 mtsp spc,%sr1
1248 idtlba pte,(%sr1,va)
1249 idtlbp prot,(%sr1,va)
1251 mtsp t1, %sr1 /* Restore sr1 */
[all …]
Dkgdb.c72 gr->sr1 = regs->sr[1]; in pt_regs_to_gdb_regs()
103 regs->sr[1] = gr->sr1; in gdb_regs_to_pt_regs()
Dhead.S270 mtsp %r0,%sr1
Dsyscall.S281 mfsp %sr1,%r2
/arch/powerpc/platforms/ps3/
Dspu.c90 u64 sr1; member
351 spu_pdata(spu)->cache.sr1 = 0x33; in ps3_create_spu()
532 static void mfc_sr1_set(struct spu *spu, u64 sr1) in mfc_sr1_set() argument
539 BUG_ON((sr1 & allowed) != (spu_pdata(spu)->cache.sr1 & allowed)); in mfc_sr1_set()
541 spu_pdata(spu)->cache.sr1 = sr1; in mfc_sr1_set()
545 spu_pdata(spu)->cache.sr1); in mfc_sr1_set()
550 return spu_pdata(spu)->cache.sr1; in mfc_sr1_get()
/arch/powerpc/platforms/cell/spufs/
Drun.c86 u64 sr1; in spu_setup_isolated() local
125 sr1 = spu_mfc_sr1_get(ctx->spu); in spu_setup_isolated()
126 sr1 &= ~MFC_STATE1_PROBLEM_STATE_MASK; in spu_setup_isolated()
127 spu_mfc_sr1_set(ctx->spu, sr1); in spu_setup_isolated()
169 sr1 |= MFC_STATE1_PROBLEM_STATE_MASK; in spu_setup_isolated()
170 spu_mfc_sr1_set(ctx->spu, sr1); in spu_setup_isolated()
Dhw_ops.c228 u64 sr1; in spu_hw_master_start() local
231 sr1 = spu_mfc_sr1_get(spu) | MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_hw_master_start()
232 spu_mfc_sr1_set(spu, sr1); in spu_hw_master_start()
239 u64 sr1; in spu_hw_master_stop() local
242 sr1 = spu_mfc_sr1_get(spu) & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_hw_master_stop()
243 spu_mfc_sr1_set(spu, sr1); in spu_hw_master_stop()
Dbacking_ops.c298 u64 sr1; in spu_backing_master_start() local
301 sr1 = csa->priv1.mfc_sr1_RW | MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_backing_master_start()
302 csa->priv1.mfc_sr1_RW = sr1; in spu_backing_master_start()
309 u64 sr1; in spu_backing_master_stop() local
312 sr1 = csa->priv1.mfc_sr1_RW & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_backing_master_stop()
313 csa->priv1.mfc_sr1_RW = sr1; in spu_backing_master_stop()
/arch/powerpc/include/asm/
Dspu_priv1.h31 void (*mfc_sr1_set) (struct spu *spu, u64 sr1);
111 spu_mfc_sr1_set (struct spu *spu, u64 sr1) in spu_mfc_sr1_set() argument
113 spu_priv1_ops->mfc_sr1_set(spu, sr1); in spu_mfc_sr1_set()
/arch/parisc/include/asm/
Dkgdb.h44 unsigned long sr1; member
Dasmregs.h70 sr1: .reg %sr1
Dassembly.h413 SAVE_SP (%sr1, PT_SR1 (\regs))
452 REST_SP (%sr1, PT_SR1 (\regs))
/arch/powerpc/platforms/cell/
Dspu_priv1_mmio.c101 static void mfc_sr1_set(struct spu *spu, u64 sr1) in mfc_sr1_set() argument
103 out_be64(&spu->priv1->mfc_sr1_RW, sr1); in mfc_sr1_set()
/arch/parisc/lib/
Dlusercopy.S97 srcspc = sr1
/arch/arm64/boot/dts/ti/
Dk3-am654-base-board.dts358 * SD card interface might fail. Boards with sr1.0 are recommended to