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Searched refs:uint32_t (Results 1 – 25 of 221) sorted by relevance

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/arch/mips/include/asm/octeon/
Dcvmx-pciercx-defs.h55 uint32_t u32;
57 __BITFIELD_FIELD(uint32_t dpe:1,
58 __BITFIELD_FIELD(uint32_t sse:1,
59 __BITFIELD_FIELD(uint32_t rma:1,
60 __BITFIELD_FIELD(uint32_t rta:1,
61 __BITFIELD_FIELD(uint32_t sta:1,
62 __BITFIELD_FIELD(uint32_t devt:2,
63 __BITFIELD_FIELD(uint32_t mdpe:1,
64 __BITFIELD_FIELD(uint32_t fbb:1,
65 __BITFIELD_FIELD(uint32_t reserved_22_22:1,
[all …]
Dcvmx-pci-defs.h118 uint32_t u32;
121 uint32_t reserved_18_31:14;
122 uint32_t addr_idx:14;
123 uint32_t ca:1;
124 uint32_t end_swp:2;
125 uint32_t addr_v:1;
127 uint32_t addr_v:1;
128 uint32_t end_swp:2;
129 uint32_t ca:1;
130 uint32_t addr_idx:14;
[all …]
Docteon.h59 uint32_t desc_version;
60 uint32_t desc_size;
68 uint32_t exception_base_addr;
69 uint32_t stack_size;
70 uint32_t heap_size;
72 uint32_t argc;
73 uint32_t argv[OCTEON_ARGV_MAX_ARGS];
85 uint32_t flags;
86 uint32_t core_mask;
88 uint32_t dram_size;
[all …]
Dcvmx-bootmem.h100 uint32_t lock;
102 uint32_t flags;
106 uint32_t major_version;
112 uint32_t minor_version;
118 uint32_t named_block_num_blocks;
121 uint32_t named_block_name_len;
125 uint32_t flags;
126 uint32_t lock;
129 uint32_t minor_version;
130 uint32_t major_version;
[all …]
Dcvmx-bootinfo.h59 uint32_t major_version;
60 uint32_t minor_version;
67 uint32_t exception_base_addr;
68 uint32_t stack_size;
69 uint32_t flags;
70 uint32_t core_mask;
72 uint32_t dram_size;
74 uint32_t phy_mem_desc_addr;
76 uint32_t debugger_flags_base_addr;
79 uint32_t eclock_hz;
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Dcvmx-l2c.h169 void cvmx_l2c_config_perf(uint32_t counter, enum cvmx_l2c_event event,
170 uint32_t clear_on_read);
180 uint64_t cvmx_l2c_read_perf(uint32_t counter);
191 int cvmx_l2c_get_core_way_partition(uint32_t core);
209 int cvmx_l2c_set_core_way_partition(uint32_t core, uint32_t mask);
235 int cvmx_l2c_set_hw_way_partition(uint32_t mask);
299 union cvmx_l2c_tag cvmx_l2c_get_tag(uint32_t association, uint32_t index);
302 static inline union cvmx_l2c_tag cvmx_get_l2c_tag(uint32_t association,
303 uint32_t index)
305 static inline union cvmx_l2c_tag cvmx_get_l2c_tag(uint32_t association, in cvmx_get_l2c_tag()
[all …]
Dcvmx-sysinfo.h63 uint32_t stack_size;
65 uint32_t heap_size;
69 uint32_t init_core;
75 uint32_t cpu_clock_hz;
78 uint32_t dram_data_rate_hz;
106 uint32_t dfa_ref_clock_hz;
108 uint32_t bootloader_config_flags;
Dcvmx-pip.h185 uint32_t dropped_octets;
187 uint32_t dropped_packets;
189 uint32_t pci_raw_packets;
191 uint32_t octets;
193 uint32_t packets;
199 uint32_t multicast_packets;
205 uint32_t broadcast_packets;
207 uint32_t len_64_packets;
209 uint32_t len_65_127_packets;
211 uint32_t len_128_255_packets;
[all …]
/arch/mips/cavium-octeon/
Docteon_boot.h15 uint32_t app_start_func_addr;
17 uint32_t k0_val;
20 uint32_t flags; /* flags */
21 uint32_t pad;
27 uint32_t labi_signature;
28 uint32_t start_core0_addr;
29 uint32_t avail_coremask;
30 uint32_t pci_console_active;
31 uint32_t icache_prefetch_disable;
32 uint32_t padding;
[all …]
/arch/parisc/include/asm/
Dhardware.h43 volatile uint32_t nothing; /* reg 0 */
44 volatile uint32_t io_eim;
45 volatile uint32_t io_dc_adata;
46 volatile uint32_t io_ii_cdata;
47 volatile uint32_t io_dma_link; /* reg 4 */
48 volatile uint32_t io_dma_command;
49 volatile uint32_t io_dma_address;
50 volatile uint32_t io_dma_count;
51 volatile uint32_t io_flex; /* reg 8 */
52 volatile uint32_t io_spa_address;
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/arch/mips/include/asm/netlogic/
Dhaldefs.h45 static inline uint32_t
46 nlm_read_reg(uint64_t base, uint32_t reg) in nlm_read_reg()
48 volatile uint32_t *addr = (volatile uint32_t *)(long)base + reg; in nlm_read_reg()
54 nlm_write_reg(uint64_t base, uint32_t reg, uint32_t val) in nlm_write_reg()
56 volatile uint32_t *addr = (volatile uint32_t *)(long)base + reg; in nlm_write_reg()
71 nlm_read_reg64(uint64_t base, uint32_t reg) in nlm_read_reg64()
98 nlm_write_reg64(uint64_t base, uint32_t reg, uint64_t val) in nlm_write_reg64()
128 static inline uint32_t
129 nlm_read_reg_xkphys(uint64_t base, uint32_t reg) in nlm_read_reg_xkphys()
135 nlm_write_reg_xkphys(uint64_t base, uint32_t reg, uint32_t val) in nlm_write_reg_xkphys()
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/arch/x86/pci/
Dolpc.c41 static const uint32_t lxnb_hdr[] = { /* dev 1 function 0 - devfn = 8 */
54 static const uint32_t gxnb_hdr[] = { /* dev 1 function 0 - devfn = 8 */
67 static const uint32_t lxfb_hdr[] = { /* dev 1 function 1 - devfn = 9 */
80 static const uint32_t gxfb_hdr[] = { /* dev 1 function 1 - devfn = 9 */
93 static const uint32_t aes_hdr[] = { /* dev 1 function 2 - devfn = 0xa */
107 static const uint32_t isa_hdr[] = { /* dev f function 0 - devfn = 78 */
120 static const uint32_t ac97_hdr[] = { /* dev f function 3 - devfn = 7b */
133 static const uint32_t ohci_hdr[] = { /* dev f function 4 - devfn = 7c */
147 static const uint32_t ehci_hdr[] = { /* dev f function 4 - devfn = 7d */
165 static uint32_t ff_loc = ~0;
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/arch/csky/abiv1/
Dalignment.c13 static inline uint32_t get_ptreg(struct pt_regs *regs, uint32_t rx) in get_ptreg()
15 return rx == 15 ? regs->lr : *((uint32_t *)&(regs->a0) - 2 + rx); in get_ptreg()
18 static inline void put_ptreg(struct pt_regs *regs, uint32_t rx, uint32_t val) in put_ptreg()
23 *((uint32_t *)&(regs->a0) - 2 + rx) = val; in put_ptreg()
32 static int ldb_asm(uint32_t addr, uint32_t *valp) in ldb_asm()
34 uint32_t val; in ldb_asm()
65 static int stb_asm(uint32_t addr, uint32_t val) in stb_asm()
95 static int ldh_c(struct pt_regs *regs, uint32_t rz, uint32_t addr) in ldh_c()
97 uint32_t byte0, byte1; in ldh_c()
117 static int sth_c(struct pt_regs *regs, uint32_t rz, uint32_t addr) in sth_c()
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/arch/powerpc/include/asm/
Dopal.h33 int64_t opal_npu_spa_setup(uint64_t phb_id, uint32_t bdfn,
35 int64_t opal_npu_spa_clear_cache(uint64_t phb_id, uint32_t bdfn,
37 int64_t opal_npu_tl_set(uint64_t phb_id, uint32_t bdfn, long cap,
38 uint64_t rate_phys, uint32_t size);
49 int64_t opal_rtc_write(uint32_t year_month_day,
52 int64_t opal_tpo_write(uint64_t token, uint32_t year_mon_day,
53 uint32_t hour_min);
56 int64_t opal_cec_reboot2(uint32_t reboot_type, const char *diag);
76 uint64_t offset, uint32_t data);
77 int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority);
[all …]
Dhvcserver.h33 uint32_t unit_address;
34 uint32_t partition_ID;
39 extern int hvcs_get_partner_info(uint32_t unit_address,
41 extern int hvcs_register_connection(uint32_t unit_address,
42 uint32_t p_partition_ID, uint32_t p_unit_address);
43 extern int hvcs_free_connection(uint32_t unit_address);
/arch/parisc/kernel/
Dperf.c181 static int perf_config(uint32_t *image_ptr);
189 static int perf_stop_counters(uint32_t *raddr);
190 static const struct rdr_tbl_ent * perf_rdr_get_entry(uint32_t rdr_num);
191 static int perf_rdr_read_ubuf(uint32_t rdr_num, uint64_t *buffer);
192 static int perf_rdr_clear(uint32_t rdr_num);
194 static void perf_rdr_write(uint32_t rdr_num, uint64_t *buffer);
197 extern uint64_t perf_rdr_shift_in_W (uint32_t rdr_num, uint16_t width);
198 extern uint64_t perf_rdr_shift_in_U (uint32_t rdr_num, uint16_t width);
199 extern void perf_rdr_shift_out_W (uint32_t rdr_num, uint64_t buffer);
200 extern void perf_rdr_shift_out_U (uint32_t rdr_num, uint64_t buffer);
[all …]
Dperf_images.h15 static uint32_t onyx_images[][PCXU_IMAGE_SIZE/sizeof(uint32_t)] __ro_after_init = {
2083 static uint32_t cuda_images[][PCXW_IMAGE_SIZE/sizeof(uint32_t)] __ro_after_init = {
/arch/x86/include/asm/xen/
Dinterface_32.h50 uint32_t ebx;
51 uint32_t ecx;
52 uint32_t edx;
53 uint32_t esi;
54 uint32_t edi;
55 uint32_t ebp;
56 uint32_t eax;
59 uint32_t eip;
63 uint32_t eflags; /* eflags.IF == !saved_upcall_mask */
64 uint32_t esp;
/arch/mips/include/asm/vr41xx/
Dpci.h13 uint32_t bus_base_address;
14 uint32_t address_mask;
15 uint32_t pci_base_address;
19 uint32_t address_mask;
20 uint32_t bus_base_address;
29 uint32_t base_address;
33 uint32_t base_address;
58 uint32_t pci_clock_max;
/arch/csky/kernel/
Dperf_event.c43 uint32_t count_width;
44 uint32_t hpcr;
92 uint32_t lo, hi, tmp; in csky_pmu_read_cc()
109 cpwgr("<0, 0x2>", (uint32_t) val); in csky_pmu_write_cc()
110 cpwgr("<0, 0x3>", (uint32_t) (val >> 32)); in csky_pmu_write_cc()
116 uint32_t lo, hi, tmp; in csky_pmu_read_ic()
133 cpwgr("<0, 0x4>", (uint32_t) val); in csky_pmu_write_ic()
134 cpwgr("<0, 0x5>", (uint32_t) (val >> 32)); in csky_pmu_write_ic()
140 uint32_t lo, hi, tmp; in csky_pmu_read_icac()
157 cpwgr("<0, 0x6>", (uint32_t) val); in csky_pmu_write_icac()
[all …]
/arch/powerpc/kernel/
Dmodule_32.c156 static uint32_t do_plt_call(void *location, in do_plt_call()
173 if (entry_matches(entry, val)) return (uint32_t)entry; in do_plt_call()
183 return (uint32_t)entry; in do_plt_call()
195 uint32_t *location; in apply_relocate_add()
196 uint32_t value; in apply_relocate_add()
214 *(uint32_t *)location = value; in apply_relocate_add()
236 if ((int)(value - (uint32_t)location) < -0x02000000 in apply_relocate_add()
237 || (int)(value - (uint32_t)location) >= 0x02000000) in apply_relocate_add()
243 value, (uint32_t)location); in apply_relocate_add()
245 *(uint32_t *)location); in apply_relocate_add()
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/arch/um/drivers/
Dvector_transports.c30 uint32_t rx_key;
31 uint32_t tx_key;
32 uint32_t sequence;
41 uint32_t checksum_offset;
42 uint32_t key_offset;
43 uint32_t sequence_offset;
52 uint32_t counter;
61 uint32_t cookie_offset;
62 uint32_t session_offset;
63 uint32_t counter_offset;
[all …]
/arch/arm/mach-alpine/
Dalpine_cpu_resume.h13 uint32_t flags;
14 uint32_t resume_addr;
20 uint32_t watermark;
21 uint32_t flags;
/arch/arm/include/asm/
Dstring.h35 extern void *__memset32(uint32_t *, uint32_t v, __kernel_size_t);
36 static inline void *memset32(uint32_t *p, uint32_t v, __kernel_size_t n) in memset32()
42 extern void *__memset64(uint64_t *, uint32_t low, __kernel_size_t, uint32_t hi);
/arch/mips/netlogic/xlp/
Dahci-init.c95 static void sata_clear_glue_reg(uint64_t regbase, uint32_t off, uint32_t bit) in sata_clear_glue_reg()
97 uint32_t reg_val; in sata_clear_glue_reg()
103 static void sata_set_glue_reg(uint64_t regbase, uint32_t off, uint32_t bit) in sata_set_glue_reg()
105 uint32_t reg_val; in sata_set_glue_reg()
113 uint32_t reg_val; in nlm_sata_firmware_init()
163 uint32_t val = 0; in nlm_sata_intr_ack()
183 uint32_t val; in nlm_sata_fixup_final()

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