Home
last modified time | relevance | path

Searched refs:ADDR_SURF_MACRO_ASPECT_1 (Results 1 – 25 of 31) sorted by relevance

12

/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c448 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v6_0_tiling_mode_table_init()
460 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v6_0_tiling_mode_table_init()
468 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v6_0_tiling_mode_table_init()
476 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v6_0_tiling_mode_table_init()
566 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v6_0_tiling_mode_table_init()
574 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v6_0_tiling_mode_table_init()
582 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v6_0_tiling_mode_table_init()
590 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v6_0_tiling_mode_table_init()
598 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v6_0_tiling_mode_table_init()
606 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v6_0_tiling_mode_table_init()
[all …]
Dgfx_v8_0.c2447 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v8_0_tiling_mode_table_init()
2451 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v8_0_tiling_mode_table_init()
2455 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v8_0_tiling_mode_table_init()
2467 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v8_0_tiling_mode_table_init()
2471 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v8_0_tiling_mode_table_init()
2483 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v8_0_tiling_mode_table_init()
2640 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v8_0_tiling_mode_table_init()
2644 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v8_0_tiling_mode_table_init()
2664 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v8_0_tiling_mode_table_init()
2668 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v8_0_tiling_mode_table_init()
[all …]
Dgfx_v7_0.c1184 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v7_0_tiling_mode_table_init()
1212 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v7_0_tiling_mode_table_init()
1351 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v7_0_tiling_mode_table_init()
1355 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v7_0_tiling_mode_table_init()
1359 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v7_0_tiling_mode_table_init()
1363 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v7_0_tiling_mode_table_init()
1367 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v7_0_tiling_mode_table_init()
1379 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v7_0_tiling_mode_table_init()
1383 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v7_0_tiling_mode_table_init()
1395 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v7_0_tiling_mode_table_init()
Dsid.h1214 # define ADDR_SURF_MACRO_ASPECT_1 0 macro
/drivers/gpu/drm/radeon/
Dcik.c2446 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()
2450 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()
2454 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()
2458 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()
2462 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()
2474 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()
2478 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()
2482 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()
2486 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()
2490 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()
[all …]
Dsi.c2576 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1)); in si_tiling_mode_table_init()
2630 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1)); in si_tiling_mode_table_init()
2648 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1)); in si_tiling_mode_table_init()
2657 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1)); in si_tiling_mode_table_init()
2666 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1)); in si_tiling_mode_table_init()
2675 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1)); in si_tiling_mode_table_init()
2720 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1)); in si_tiling_mode_table_init()
2935 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1)); in si_tiling_mode_table_init()
Dsid.h1217 # define ADDR_SURF_MACRO_ASPECT_1 0 macro
Dcikd.h1271 # define ADDR_SURF_MACRO_ASPECT_1 0 macro
/drivers/gpu/drm/amd/include/asic_reg/smu/
Dsmu_8_0_enum.h976 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
Dsmu_7_1_0_enum.h1135 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
Dsmu_7_1_2_enum.h1154 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
Dsmu_7_1_3_enum.h1190 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
Dsmu_7_1_1_enum.h1136 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_5_1_enum.h976 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
Dbif_5_0_enum.h1106 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_8_2_enum.h976 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
Dgmc_8_1_enum.h1106 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_6_0_enum.h989 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
Duvd_5_0_enum.h1119 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_enum.h1061 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
Ddce_10_0_enum.h1681 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
Ddce_11_0_enum.h5548 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_enum.h1271 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
Doss_3_0_enum.h1405 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator
Doss_3_0_1_enum.h1372 ADDR_SURF_MACRO_ASPECT_1 = 0x0, enumerator

12