1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 */
5
6 #ifndef ATH11K_CORE_H
7 #define ATH11K_CORE_H
8
9 #include <linux/types.h>
10 #include <linux/interrupt.h>
11 #include <linux/irq.h>
12 #include <linux/bitfield.h>
13 #include "qmi.h"
14 #include "htc.h"
15 #include "wmi.h"
16 #include "hal.h"
17 #include "dp.h"
18 #include "ce.h"
19 #include "mac.h"
20 #include "hw.h"
21 #include "hal_rx.h"
22 #include "reg.h"
23 #include "thermal.h"
24 #include "dbring.h"
25 #include "spectral.h"
26
27 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
28
29 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512
30
31 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
32
33 /* Pending management packets threshold for dropping probe responses */
34 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
35
36 #define ATH11K_INVALID_HW_MAC_ID 0xFF
37 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ)
38
39 extern unsigned int ath11k_frame_mode;
40
41 #define ATH11K_MON_TIMER_INTERVAL 10
42
43 enum ath11k_supported_bw {
44 ATH11K_BW_20 = 0,
45 ATH11K_BW_40 = 1,
46 ATH11K_BW_80 = 2,
47 ATH11K_BW_160 = 3,
48 };
49
50 enum ath11k_bdf_search {
51 ATH11K_BDF_SEARCH_DEFAULT,
52 ATH11K_BDF_SEARCH_BUS_AND_BOARD,
53 };
54
55 enum wme_ac {
56 WME_AC_BE,
57 WME_AC_BK,
58 WME_AC_VI,
59 WME_AC_VO,
60 WME_NUM_AC
61 };
62
63 #define ATH11K_HT_MCS_MAX 7
64 #define ATH11K_VHT_MCS_MAX 9
65 #define ATH11K_HE_MCS_MAX 11
66
67 enum ath11k_crypt_mode {
68 /* Only use hardware crypto engine */
69 ATH11K_CRYPT_MODE_HW,
70 /* Only use software crypto */
71 ATH11K_CRYPT_MODE_SW,
72 };
73
ath11k_tid_to_ac(u32 tid)74 static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
75 {
76 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
77 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
78 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
79 WME_AC_VO);
80 }
81
82 enum ath11k_skb_flags {
83 ATH11K_SKB_HW_80211_ENCAP = BIT(0),
84 ATH11K_SKB_CIPHER_SET = BIT(1),
85 };
86
87 struct ath11k_skb_cb {
88 dma_addr_t paddr;
89 u8 eid;
90 u8 flags;
91 u32 cipher;
92 struct ath11k *ar;
93 struct ieee80211_vif *vif;
94 } __packed;
95
96 struct ath11k_skb_rxcb {
97 dma_addr_t paddr;
98 bool is_first_msdu;
99 bool is_last_msdu;
100 bool is_continuation;
101 struct hal_rx_desc *rx_desc;
102 u8 err_rel_src;
103 u8 err_code;
104 u8 mac_id;
105 u8 unmapped;
106 u8 is_frag;
107 u8 tid;
108 };
109
110 enum ath11k_hw_rev {
111 ATH11K_HW_IPQ8074,
112 ATH11K_HW_QCA6390_HW20,
113 ATH11K_HW_IPQ6018_HW10,
114 ATH11K_HW_QCN9074_HW10,
115 ATH11K_HW_WCN6855_HW20,
116 };
117
118 enum ath11k_firmware_mode {
119 /* the default mode, standard 802.11 functionality */
120 ATH11K_FIRMWARE_MODE_NORMAL,
121
122 /* factory tests etc */
123 ATH11K_FIRMWARE_MODE_FTM,
124
125 /* Cold boot calibration */
126 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
127 };
128
129 extern bool ath11k_cold_boot_cal;
130
131 #define ATH11K_IRQ_NUM_MAX 52
132 #define ATH11K_EXT_IRQ_NUM_MAX 16
133
134 struct ath11k_ext_irq_grp {
135 struct ath11k_base *ab;
136 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
137 u32 num_irq;
138 u32 grp_id;
139 u64 timestamp;
140 bool napi_enabled;
141 struct napi_struct napi;
142 struct net_device napi_ndev;
143 };
144
145 #define HEHANDLE_CAP_PHYINFO_SIZE 3
146 #define HECAP_PHYINFO_SIZE 9
147 #define HECAP_MACINFO_SIZE 5
148 #define HECAP_TXRX_MCS_NSS_SIZE 2
149 #define HECAP_PPET16_PPET8_MAX_SIZE 25
150
151 #define HE_PPET16_PPET8_SIZE 8
152
153 /* 802.11ax PPE (PPDU packet Extension) threshold */
154 struct he_ppe_threshold {
155 u32 numss_m1;
156 u32 ru_mask;
157 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
158 };
159
160 struct ath11k_he {
161 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
162 u32 hecap_rxmcsnssmap;
163 u32 hecap_txmcsnssmap;
164 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
165 struct he_ppe_threshold hecap_ppet;
166 u32 heop_param;
167 };
168
169 #define MAX_RADIOS 3
170
171 enum {
172 WMI_HOST_TP_SCALE_MAX = 0,
173 WMI_HOST_TP_SCALE_50 = 1,
174 WMI_HOST_TP_SCALE_25 = 2,
175 WMI_HOST_TP_SCALE_12 = 3,
176 WMI_HOST_TP_SCALE_MIN = 4,
177 WMI_HOST_TP_SCALE_SIZE = 5,
178 };
179
180 enum ath11k_scan_state {
181 ATH11K_SCAN_IDLE,
182 ATH11K_SCAN_STARTING,
183 ATH11K_SCAN_RUNNING,
184 ATH11K_SCAN_ABORTING,
185 };
186
187 enum ath11k_dev_flags {
188 ATH11K_CAC_RUNNING,
189 ATH11K_FLAG_CORE_REGISTERED,
190 ATH11K_FLAG_CRASH_FLUSH,
191 ATH11K_FLAG_RAW_MODE,
192 ATH11K_FLAG_HW_CRYPTO_DISABLED,
193 ATH11K_FLAG_BTCOEX,
194 ATH11K_FLAG_RECOVERY,
195 ATH11K_FLAG_UNREGISTERING,
196 ATH11K_FLAG_REGISTERED,
197 ATH11K_FLAG_QMI_FAIL,
198 ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
199 };
200
201 enum ath11k_monitor_flags {
202 ATH11K_FLAG_MONITOR_ENABLED,
203 };
204
205 struct ath11k_vif {
206 u32 vdev_id;
207 enum wmi_vdev_type vdev_type;
208 enum wmi_vdev_subtype vdev_subtype;
209 u32 beacon_interval;
210 u32 dtim_period;
211 u16 ast_hash;
212 u16 ast_idx;
213 u16 tcl_metadata;
214 u8 hal_addr_search_flags;
215 u8 search_type;
216
217 struct ath11k *ar;
218 struct ieee80211_vif *vif;
219
220 u16 tx_seq_no;
221 struct wmi_wmm_params_all_arg wmm_params;
222 struct list_head list;
223 union {
224 struct {
225 u32 uapsd;
226 } sta;
227 struct {
228 /* 127 stations; wmi limit */
229 u8 tim_bitmap[16];
230 u8 tim_len;
231 u32 ssid_len;
232 u8 ssid[IEEE80211_MAX_SSID_LEN];
233 bool hidden_ssid;
234 /* P2P_IE with NoA attribute for P2P_GO case */
235 u32 noa_len;
236 u8 *noa_data;
237 } ap;
238 } u;
239
240 bool is_started;
241 bool is_up;
242 bool spectral_enabled;
243 u32 aid;
244 u8 bssid[ETH_ALEN];
245 struct cfg80211_bitrate_mask bitrate_mask;
246 struct delayed_work connection_loss_work;
247 int num_legacy_stations;
248 int rtscts_prot_mode;
249 int txpower;
250 bool rsnie_present;
251 bool wpaie_present;
252 struct ieee80211_chanctx_conf chanctx;
253 };
254
255 struct ath11k_vif_iter {
256 u32 vdev_id;
257 struct ath11k_vif *arvif;
258 };
259
260 struct ath11k_rx_peer_stats {
261 u64 num_msdu;
262 u64 num_mpdu_fcs_ok;
263 u64 num_mpdu_fcs_err;
264 u64 tcp_msdu_count;
265 u64 udp_msdu_count;
266 u64 other_msdu_count;
267 u64 ampdu_msdu_count;
268 u64 non_ampdu_msdu_count;
269 u64 stbc_count;
270 u64 beamformed_count;
271 u64 mcs_count[HAL_RX_MAX_MCS + 1];
272 u64 nss_count[HAL_RX_MAX_NSS];
273 u64 bw_count[HAL_RX_BW_MAX];
274 u64 gi_count[HAL_RX_GI_MAX];
275 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
276 u64 tid_count[IEEE80211_NUM_TIDS + 1];
277 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
278 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
279 u64 rx_duration;
280 u64 dcm_count;
281 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
282 };
283
284 #define ATH11K_HE_MCS_NUM 12
285 #define ATH11K_VHT_MCS_NUM 10
286 #define ATH11K_BW_NUM 4
287 #define ATH11K_NSS_NUM 4
288 #define ATH11K_LEGACY_NUM 12
289 #define ATH11K_GI_NUM 4
290 #define ATH11K_HT_MCS_NUM 32
291
292 enum ath11k_pkt_rx_err {
293 ATH11K_PKT_RX_ERR_FCS,
294 ATH11K_PKT_RX_ERR_TKIP,
295 ATH11K_PKT_RX_ERR_CRYPT,
296 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
297 ATH11K_PKT_RX_ERR_MAX,
298 };
299
300 enum ath11k_ampdu_subfrm_num {
301 ATH11K_AMPDU_SUBFRM_NUM_10,
302 ATH11K_AMPDU_SUBFRM_NUM_20,
303 ATH11K_AMPDU_SUBFRM_NUM_30,
304 ATH11K_AMPDU_SUBFRM_NUM_40,
305 ATH11K_AMPDU_SUBFRM_NUM_50,
306 ATH11K_AMPDU_SUBFRM_NUM_60,
307 ATH11K_AMPDU_SUBFRM_NUM_MORE,
308 ATH11K_AMPDU_SUBFRM_NUM_MAX,
309 };
310
311 enum ath11k_amsdu_subfrm_num {
312 ATH11K_AMSDU_SUBFRM_NUM_1,
313 ATH11K_AMSDU_SUBFRM_NUM_2,
314 ATH11K_AMSDU_SUBFRM_NUM_3,
315 ATH11K_AMSDU_SUBFRM_NUM_4,
316 ATH11K_AMSDU_SUBFRM_NUM_MORE,
317 ATH11K_AMSDU_SUBFRM_NUM_MAX,
318 };
319
320 enum ath11k_counter_type {
321 ATH11K_COUNTER_TYPE_BYTES,
322 ATH11K_COUNTER_TYPE_PKTS,
323 ATH11K_COUNTER_TYPE_MAX,
324 };
325
326 enum ath11k_stats_type {
327 ATH11K_STATS_TYPE_SUCC,
328 ATH11K_STATS_TYPE_FAIL,
329 ATH11K_STATS_TYPE_RETRY,
330 ATH11K_STATS_TYPE_AMPDU,
331 ATH11K_STATS_TYPE_MAX,
332 };
333
334 struct ath11k_htt_data_stats {
335 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
336 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
337 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
338 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
339 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
340 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
341 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
342 };
343
344 struct ath11k_htt_tx_stats {
345 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
346 u64 tx_duration;
347 u64 ba_fails;
348 u64 ack_fails;
349 };
350
351 struct ath11k_per_ppdu_tx_stats {
352 u16 succ_pkts;
353 u16 failed_pkts;
354 u16 retry_pkts;
355 u32 succ_bytes;
356 u32 failed_bytes;
357 u32 retry_bytes;
358 };
359
360 struct ath11k_sta {
361 struct ath11k_vif *arvif;
362
363 /* the following are protected by ar->data_lock */
364 u32 changed; /* IEEE80211_RC_* */
365 u32 bw;
366 u32 nss;
367 u32 smps;
368 enum hal_pn_type pn_type;
369
370 struct work_struct update_wk;
371 struct rate_info txrate;
372 struct rate_info last_txrate;
373 u64 rx_duration;
374 u64 tx_duration;
375 u8 rssi_comb;
376 struct ath11k_htt_tx_stats *tx_stats;
377 struct ath11k_rx_peer_stats *rx_stats;
378
379 #ifdef CONFIG_MAC80211_DEBUGFS
380 /* protected by conf_mutex */
381 bool aggr_mode;
382 #endif
383 };
384
385 #define ATH11K_MIN_5G_FREQ 4150
386 #define ATH11K_MIN_6G_FREQ 5945
387 #define ATH11K_MAX_6G_FREQ 7115
388 #define ATH11K_NUM_CHANS 100
389 #define ATH11K_MAX_5G_CHAN 173
390
391 enum ath11k_state {
392 ATH11K_STATE_OFF,
393 ATH11K_STATE_ON,
394 ATH11K_STATE_RESTARTING,
395 ATH11K_STATE_RESTARTED,
396 ATH11K_STATE_WEDGED,
397 /* Add other states as required */
398 };
399
400 /* Antenna noise floor */
401 #define ATH11K_DEFAULT_NOISE_FLOOR -95
402
403 struct ath11k_fw_stats {
404 struct dentry *debugfs_fwstats;
405 u32 pdev_id;
406 u32 stats_id;
407 struct list_head pdevs;
408 struct list_head vdevs;
409 struct list_head bcn;
410 };
411
412 struct ath11k_dbg_htt_stats {
413 u8 type;
414 u8 reset;
415 struct debug_htt_stats_req *stats_req;
416 /* protects shared stats req buffer */
417 spinlock_t lock;
418 };
419
420 struct ath11k_debug {
421 struct dentry *debugfs_pdev;
422 struct ath11k_dbg_htt_stats htt_stats;
423 u32 extd_tx_stats;
424 struct ath11k_fw_stats fw_stats;
425 struct completion fw_stats_complete;
426 bool fw_stats_done;
427 u32 extd_rx_stats;
428 u32 pktlog_filter;
429 u32 pktlog_mode;
430 u32 pktlog_peer_valid;
431 u8 pktlog_peer_addr[ETH_ALEN];
432 u32 rx_filter;
433 };
434
435 struct ath11k_per_peer_tx_stats {
436 u32 succ_bytes;
437 u32 retry_bytes;
438 u32 failed_bytes;
439 u16 succ_pkts;
440 u16 retry_pkts;
441 u16 failed_pkts;
442 u32 duration;
443 u8 ba_fails;
444 bool is_ampdu;
445 };
446
447 #define ATH11K_FLUSH_TIMEOUT (5 * HZ)
448 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
449
450 struct ath11k {
451 struct ath11k_base *ab;
452 struct ath11k_pdev *pdev;
453 struct ieee80211_hw *hw;
454 struct ieee80211_ops *ops;
455 struct ath11k_pdev_wmi *wmi;
456 struct ath11k_pdev_dp dp;
457 u8 mac_addr[ETH_ALEN];
458 u32 ht_cap_info;
459 u32 vht_cap_info;
460 struct ath11k_he ar_he;
461 enum ath11k_state state;
462 bool supports_6ghz;
463 struct {
464 struct completion started;
465 struct completion completed;
466 struct completion on_channel;
467 struct delayed_work timeout;
468 enum ath11k_scan_state state;
469 bool is_roc;
470 int vdev_id;
471 int roc_freq;
472 bool roc_notify;
473 } scan;
474
475 struct {
476 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
477 struct ieee80211_sband_iftype_data
478 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
479 } mac;
480
481 unsigned long dev_flags;
482 unsigned int filter_flags;
483 unsigned long monitor_flags;
484 u32 min_tx_power;
485 u32 max_tx_power;
486 u32 txpower_limit_2g;
487 u32 txpower_limit_5g;
488 u32 txpower_scale;
489 u32 power_scale;
490 u32 chan_tx_pwr;
491 u32 num_stations;
492 u32 max_num_stations;
493 bool monitor_present;
494 /* To synchronize concurrent synchronous mac80211 callback operations,
495 * concurrent debugfs configuration and concurrent FW statistics events.
496 */
497 struct mutex conf_mutex;
498 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
499 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
500 * channel context data, survey info, test mode data.
501 */
502 spinlock_t data_lock;
503
504 struct list_head arvifs;
505 /* should never be NULL; needed for regular htt rx */
506 struct ieee80211_channel *rx_channel;
507
508 /* valid during scan; needed for mgmt rx during scan */
509 struct ieee80211_channel *scan_channel;
510
511 u8 cfg_tx_chainmask;
512 u8 cfg_rx_chainmask;
513 u8 num_rx_chains;
514 u8 num_tx_chains;
515 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
516 u8 pdev_idx;
517 u8 lmac_id;
518
519 struct completion peer_assoc_done;
520 struct completion peer_delete_done;
521
522 int install_key_status;
523 struct completion install_key_done;
524
525 int last_wmi_vdev_start_status;
526 struct completion vdev_setup_done;
527 struct completion vdev_delete_done;
528
529 int num_peers;
530 int max_num_peers;
531 u32 num_started_vdevs;
532 u32 num_created_vdevs;
533 unsigned long long allocated_vdev_map;
534
535 struct idr txmgmt_idr;
536 /* protects txmgmt_idr data */
537 spinlock_t txmgmt_idr_lock;
538 atomic_t num_pending_mgmt_tx;
539
540 /* cycle count is reported twice for each visited channel during scan.
541 * access protected by data_lock
542 */
543 u32 survey_last_rx_clear_count;
544 u32 survey_last_cycle_count;
545
546 /* Channel info events are expected to come in pairs without and with
547 * COMPLETE flag set respectively for each channel visit during scan.
548 *
549 * However there are deviations from this rule. This flag is used to
550 * avoid reporting garbage data.
551 */
552 bool ch_info_can_report_survey;
553 struct survey_info survey[ATH11K_NUM_CHANS];
554 struct completion bss_survey_done;
555
556 struct work_struct regd_update_work;
557
558 struct work_struct wmi_mgmt_tx_work;
559 struct sk_buff_head wmi_mgmt_tx_queue;
560
561 struct ath11k_per_peer_tx_stats peer_tx_stats;
562 struct list_head ppdu_stats_info;
563 u32 ppdu_stat_list_depth;
564
565 struct ath11k_per_peer_tx_stats cached_stats;
566 u32 last_ppdu_id;
567 u32 cached_ppdu_id;
568 #ifdef CONFIG_ATH11K_DEBUGFS
569 struct ath11k_debug debug;
570 #endif
571 #ifdef CONFIG_ATH11K_SPECTRAL
572 struct ath11k_spectral spectral;
573 #endif
574 bool dfs_block_radar_events;
575 struct ath11k_thermal thermal;
576 };
577
578 struct ath11k_band_cap {
579 u32 phy_id;
580 u32 max_bw_supported;
581 u32 ht_cap_info;
582 u32 he_cap_info[2];
583 u32 he_mcs;
584 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
585 struct ath11k_ppe_threshold he_ppet;
586 u16 he_6ghz_capa;
587 };
588
589 struct ath11k_pdev_cap {
590 u32 supported_bands;
591 u32 ampdu_density;
592 u32 vht_cap;
593 u32 vht_mcs;
594 u32 he_mcs;
595 u32 tx_chain_mask;
596 u32 rx_chain_mask;
597 u32 tx_chain_mask_shift;
598 u32 rx_chain_mask_shift;
599 struct ath11k_band_cap band[NUM_NL80211_BANDS];
600 };
601
602 struct ath11k_pdev {
603 struct ath11k *ar;
604 u32 pdev_id;
605 struct ath11k_pdev_cap cap;
606 u8 mac_addr[ETH_ALEN];
607 };
608
609 struct ath11k_board_data {
610 const struct firmware *fw;
611 const void *data;
612 size_t len;
613 };
614
615 struct ath11k_bus_params {
616 bool mhi_support;
617 bool m3_fw_support;
618 bool fixed_bdf_addr;
619 bool fixed_mem_region;
620 bool static_window_map;
621 };
622
623 /* IPQ8074 HW channel counters frequency value in hertz */
624 #define IPQ8074_CC_FREQ_HERTZ 320000
625
626 struct ath11k_bp_stats {
627 /* Head Pointer reported by the last HTT Backpressure event for the ring */
628 u16 hp;
629
630 /* Tail Pointer reported by the last HTT Backpressure event for the ring */
631 u16 tp;
632
633 /* Number of Backpressure events received for the ring */
634 u32 count;
635
636 /* Last recorded event timestamp */
637 unsigned long jiffies;
638 };
639
640 struct ath11k_dp_ring_bp_stats {
641 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
642 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
643 };
644
645 struct ath11k_soc_dp_tx_err_stats {
646 /* TCL Ring Descriptor unavailable */
647 u32 desc_na[DP_TCL_NUM_RING_MAX];
648 /* Other failures during dp_tx due to mem allocation failure
649 * idr unavailable etc.
650 */
651 atomic_t misc_fail;
652 };
653
654 struct ath11k_soc_dp_stats {
655 u32 err_ring_pkts;
656 u32 invalid_rbm;
657 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
658 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
659 u32 hal_reo_error[DP_REO_DST_RING_MAX];
660 struct ath11k_soc_dp_tx_err_stats tx_err;
661 struct ath11k_dp_ring_bp_stats bp_stats;
662 };
663
664 /* Master structure to hold the hw data which may be used in core module */
665 struct ath11k_base {
666 enum ath11k_hw_rev hw_rev;
667 struct platform_device *pdev;
668 struct device *dev;
669 struct ath11k_qmi qmi;
670 struct ath11k_wmi_base wmi_ab;
671 struct completion fw_ready;
672 int num_radios;
673 /* HW channel counters frequency value in hertz common to all MACs */
674 u32 cc_freq_hz;
675
676 struct ath11k_htc htc;
677
678 struct ath11k_dp dp;
679
680 void __iomem *mem;
681 unsigned long mem_len;
682
683 struct {
684 enum ath11k_bus bus;
685 const struct ath11k_hif_ops *ops;
686 } hif;
687
688 struct {
689 struct completion wakeup_completed;
690 } wow;
691
692 struct ath11k_ce ce;
693 struct timer_list rx_replenish_retry;
694 struct ath11k_hal hal;
695 /* To synchronize core_start/core_stop */
696 struct mutex core_lock;
697 /* Protects data like peers */
698 spinlock_t base_lock;
699 struct ath11k_pdev pdevs[MAX_RADIOS];
700 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
701 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
702 unsigned long long free_vdev_map;
703 struct list_head peers;
704 wait_queue_head_t peer_mapping_wq;
705 u8 mac_addr[ETH_ALEN];
706 bool wmi_ready;
707 u32 wlan_init_status;
708 int irq_num[ATH11K_IRQ_NUM_MAX];
709 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
710 struct ath11k_targ_cap target_caps;
711 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
712 bool pdevs_macaddr_valid;
713 int bd_api;
714
715 struct ath11k_hw_params hw_params;
716 struct ath11k_bus_params bus_params;
717
718 const struct firmware *cal_file;
719
720 /* Below regd's are protected by ab->data_lock */
721 /* This is the regd set for every radio
722 * by the firmware during initializatin
723 */
724 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
725 /* This regd is set during dynamic country setting
726 * This may or may not be used during the runtime
727 */
728 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
729
730 /* Current DFS Regulatory */
731 enum ath11k_dfs_region dfs_region;
732 #ifdef CONFIG_ATH11K_DEBUGFS
733 struct dentry *debugfs_soc;
734 #endif
735 struct ath11k_soc_dp_stats soc_stats;
736
737 unsigned long dev_flags;
738 struct completion driver_recovery;
739 struct workqueue_struct *workqueue;
740 struct work_struct restart_work;
741 struct {
742 /* protected by data_lock */
743 u32 fw_crash_counter;
744 } stats;
745 u32 pktlog_defs_checksum;
746
747 struct ath11k_dbring_cap *db_caps;
748 u32 num_db_cap;
749
750 struct timer_list mon_reap_timer;
751
752 struct completion htc_suspend;
753
754 struct {
755 enum ath11k_bdf_search bdf_search;
756 u32 vendor;
757 u32 device;
758 u32 subsystem_vendor;
759 u32 subsystem_device;
760 } id;
761
762 /* must be last */
763 u8 drv_priv[0] __aligned(sizeof(void *));
764 };
765
766 struct ath11k_fw_stats_pdev {
767 struct list_head list;
768
769 /* PDEV stats */
770 s32 ch_noise_floor;
771 /* Cycles spent transmitting frames */
772 u32 tx_frame_count;
773 /* Cycles spent receiving frames */
774 u32 rx_frame_count;
775 /* Total channel busy time, evidently */
776 u32 rx_clear_count;
777 /* Total on-channel time */
778 u32 cycle_count;
779 u32 phy_err_count;
780 u32 chan_tx_power;
781 u32 ack_rx_bad;
782 u32 rts_bad;
783 u32 rts_good;
784 u32 fcs_bad;
785 u32 no_beacons;
786 u32 mib_int_count;
787
788 /* PDEV TX stats */
789 /* Num HTT cookies queued to dispatch list */
790 s32 comp_queued;
791 /* Num HTT cookies dispatched */
792 s32 comp_delivered;
793 /* Num MSDU queued to WAL */
794 s32 msdu_enqued;
795 /* Num MPDU queue to WAL */
796 s32 mpdu_enqued;
797 /* Num MSDUs dropped by WMM limit */
798 s32 wmm_drop;
799 /* Num Local frames queued */
800 s32 local_enqued;
801 /* Num Local frames done */
802 s32 local_freed;
803 /* Num queued to HW */
804 s32 hw_queued;
805 /* Num PPDU reaped from HW */
806 s32 hw_reaped;
807 /* Num underruns */
808 s32 underrun;
809 /* Num PPDUs cleaned up in TX abort */
810 s32 tx_abort;
811 /* Num MPDUs requeued by SW */
812 s32 mpdus_requeued;
813 /* excessive retries */
814 u32 tx_ko;
815 /* data hw rate code */
816 u32 data_rc;
817 /* Scheduler self triggers */
818 u32 self_triggers;
819 /* frames dropped due to excessive sw retries */
820 u32 sw_retry_failure;
821 /* illegal rate phy errors */
822 u32 illgl_rate_phy_err;
823 /* wal pdev continuous xretry */
824 u32 pdev_cont_xretry;
825 /* wal pdev tx timeouts */
826 u32 pdev_tx_timeout;
827 /* wal pdev resets */
828 u32 pdev_resets;
829 /* frames dropped due to non-availability of stateless TIDs */
830 u32 stateless_tid_alloc_failure;
831 /* PhY/BB underrun */
832 u32 phy_underrun;
833 /* MPDU is more than txop limit */
834 u32 txop_ovf;
835
836 /* PDEV RX stats */
837 /* Cnts any change in ring routing mid-ppdu */
838 s32 mid_ppdu_route_change;
839 /* Total number of statuses processed */
840 s32 status_rcvd;
841 /* Extra frags on rings 0-3 */
842 s32 r0_frags;
843 s32 r1_frags;
844 s32 r2_frags;
845 s32 r3_frags;
846 /* MSDUs / MPDUs delivered to HTT */
847 s32 htt_msdus;
848 s32 htt_mpdus;
849 /* MSDUs / MPDUs delivered to local stack */
850 s32 loc_msdus;
851 s32 loc_mpdus;
852 /* AMSDUs that have more MSDUs than the status ring size */
853 s32 oversize_amsdu;
854 /* Number of PHY errors */
855 s32 phy_errs;
856 /* Number of PHY errors drops */
857 s32 phy_err_drop;
858 /* Number of mpdu errors - FCS, MIC, ENC etc. */
859 s32 mpdu_errs;
860 };
861
862 struct ath11k_fw_stats_vdev {
863 struct list_head list;
864
865 u32 vdev_id;
866 u32 beacon_snr;
867 u32 data_snr;
868 u32 num_tx_frames[WLAN_MAX_AC];
869 u32 num_rx_frames;
870 u32 num_tx_frames_retries[WLAN_MAX_AC];
871 u32 num_tx_frames_failures[WLAN_MAX_AC];
872 u32 num_rts_fail;
873 u32 num_rts_success;
874 u32 num_rx_err;
875 u32 num_rx_discard;
876 u32 num_tx_not_acked;
877 u32 tx_rate_history[MAX_TX_RATE_VALUES];
878 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
879 };
880
881 struct ath11k_fw_stats_bcn {
882 struct list_head list;
883
884 u32 vdev_id;
885 u32 tx_bcn_succ_cnt;
886 u32 tx_bcn_outage_cnt;
887 };
888
889 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
890 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
891 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
892
893 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
894 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
895
896 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
897 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
898 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
899 int ath11k_core_pre_init(struct ath11k_base *ab);
900 int ath11k_core_init(struct ath11k_base *ath11k);
901 void ath11k_core_deinit(struct ath11k_base *ath11k);
902 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
903 enum ath11k_bus bus,
904 const struct ath11k_bus_params *bus_params);
905 void ath11k_core_free(struct ath11k_base *ath11k);
906 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
907 struct ath11k_board_data *bd);
908 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
909 int ath11k_core_check_dt(struct ath11k_base *ath11k);
910
911 void ath11k_core_halt(struct ath11k *ar);
912 int ath11k_core_resume(struct ath11k_base *ab);
913 int ath11k_core_suspend(struct ath11k_base *ab);
914
915 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
916 const char *filename);
917
ath11k_scan_state_str(enum ath11k_scan_state state)918 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
919 {
920 switch (state) {
921 case ATH11K_SCAN_IDLE:
922 return "idle";
923 case ATH11K_SCAN_STARTING:
924 return "starting";
925 case ATH11K_SCAN_RUNNING:
926 return "running";
927 case ATH11K_SCAN_ABORTING:
928 return "aborting";
929 }
930
931 return "unknown";
932 }
933
ATH11K_SKB_CB(struct sk_buff * skb)934 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
935 {
936 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
937 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
938 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
939 }
940
ATH11K_SKB_RXCB(struct sk_buff * skb)941 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
942 {
943 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
944 return (struct ath11k_skb_rxcb *)skb->cb;
945 }
946
ath11k_vif_to_arvif(struct ieee80211_vif * vif)947 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
948 {
949 return (struct ath11k_vif *)vif->drv_priv;
950 }
951
ath11k_ab_to_ar(struct ath11k_base * ab,int mac_id)952 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
953 int mac_id)
954 {
955 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
956 }
957
ath11k_core_create_firmware_path(struct ath11k_base * ab,const char * filename,void * buf,size_t buf_len)958 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
959 const char *filename,
960 void *buf, size_t buf_len)
961 {
962 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
963 ab->hw_params.fw.dir, filename);
964 }
965
ath11k_bus_str(enum ath11k_bus bus)966 static inline const char *ath11k_bus_str(enum ath11k_bus bus)
967 {
968 switch (bus) {
969 case ATH11K_BUS_PCI:
970 return "pci";
971 case ATH11K_BUS_AHB:
972 return "ahb";
973 }
974
975 return "unknown";
976 }
977
978 #endif /* _CORE_H_ */
979