/drivers/mmc/host/ |
D | mmci_qcom_dml.c | 24 #define BYPASS BIT(16) macro 149 config &= ~BYPASS; in qcom_dma_setup()
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/drivers/infiniband/hw/hfi1/ |
D | trace.h | 13 packettype_name(BYPASS))
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D | chip.c | 645 /*11*/ FLAG_ENTRY0("BypassErr", SEEI(BYPASS)),
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/drivers/crypto/ccree/ |
D | cc_sram_mgr.c | 87 set_flow_mode(&seq[idx], BYPASS); in cc_set_sram_desc()
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D | cc_aead.c | 494 set_flow_mode(&desc[idx], BYPASS); in cc_get_plain_hmac_key() 503 set_flow_mode(&desc[idx], BYPASS); in cc_get_plain_hmac_key() 512 set_flow_mode(&desc[idx], BYPASS); in cc_get_plain_hmac_key() 523 set_flow_mode(&desc[idx], BYPASS); in cc_get_plain_hmac_key() 1180 set_flow_mode(&desc[*seq_size], BYPASS); in cc_mlli_to_sram() 1800 cc_proc_cipher_desc(req, BYPASS, desc, seq_size); in cc_gcm()
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D | cc_hw_queue_defs.h | 94 BYPASS = 0, enumerator
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D | cc_hash.c | 812 set_flow_mode(&desc[idx], BYPASS); in cc_hash_setkey() 823 set_flow_mode(&desc[idx], BYPASS); in cc_hash_setkey() 832 set_flow_mode(&desc[idx], BYPASS); in cc_hash_setkey() 843 set_flow_mode(&desc[idx], BYPASS); in cc_hash_setkey() 2190 set_flow_mode(&desc[idx], BYPASS); in cc_set_desc()
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D | cc_request_mgr.c | 175 set_flow_mode(&req_mgr_h->compl_desc, BYPASS); in cc_req_mgr_init()
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D | cc_cipher.c | 792 set_flow_mode(&desc[*seq_size], BYPASS); in cc_setup_mlli_desc()
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/drivers/gpu/drm/radeon/ |
D | rv740d.h | 59 #define BYPASS (1 << 19) macro
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D | rv740_dpm.c | 351 mpll_dq_func_cntl_2 |= BYPASS | BIAS_GEN_PDNB | RESET_EN; in rv740_populate_smc_acpi_state()
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D | rv770d.h | 132 #define BYPASS (1 << 19) macro
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D | nid.h | 574 #define BYPASS (1 << 19) macro
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D | evergreend.h | 112 #define BYPASS (1 << 19) macro
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D | cypress_dpm.c | 1400 mpll_dq_func_cntl_2 |= BIAS_GEN_PDNB | RESET_EN | BYPASS; in cypress_populate_smc_acpi_state()
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D | ni_dpm.c | 1870 mpll_dq_func_cntl_2 |= BIAS_GEN_PDNB | RESET_EN | BYPASS; in ni_populate_smc_acpi_state()
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/drivers/net/ethernet/marvell/octeontx2/af/ |
D | common.h | 226 BYPASS = 0x1, enumerator
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D | rvu_debugfs.c | 991 ndc_cache_stats(s, blk_addr, BYPASS, NDC_READ_TRANS); in ndc_blk_cache_stats() 993 ndc_cache_stats(s, blk_addr, BYPASS, NDC_WRITE_TRANS); in ndc_blk_cache_stats()
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/drivers/gpu/drm/nouveau/dispnv50/ |
D | wndwc37e.c | 186 NVDEF(NVC37E, SET_PARAMS, INPUT_RANGE, BYPASS) | in wndwc37e_image_set()
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/drivers/net/ethernet/huawei/hinic/ |
D | hinic_hw_api_cmd.c | 67 BYPASS = 1, enumerator
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/drivers/iommu/ |
D | msm_iommu_hw-8xxx.h | 219 #define SET_BYPASS(b, v) SET_GLOBAL_FIELD(b, ESR, BYPASS, v) 336 #define GET_BYPASS(b) GET_GLOBAL_FIELD(b, ESR, BYPASS) 878 #define BYPASS (BYPASS_MASK << BYPASS_SHIFT) macro
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/drivers/gpu/drm/msm/adreno/ |
D | adreno_pm4.xml.h | 427 BYPASS = 1, enumerator
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