Searched refs:CLK (Results 1 – 11 of 11) sorted by relevance
/drivers/gpu/drm/amd/display/dc/gpio/ |
D | ddc_regs.h | 151 DDC_REG_LIST(CLK,id)\ 161 DDC_VGA_REG_LIST(CLK)\ 180 DDC_REG_LIST_DCN2(CLK, id)\
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/drivers/gpu/drm/msm/dsi/ |
D | mmss_cc.xml.h | 58 CLK = 0, enumerator 67 case CLK: return 0x0000004c; in __offset_CLK()
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/drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
D | hw_factory_dcn30.c | 136 DDC_GPIO_VGA_REG_LIST(CLK),
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/drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
D | hw_factory_dcn20.c | 128 DDC_GPIO_VGA_REG_LIST(CLK),
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/drivers/clk/ti/ |
D | clock.h | 95 #define CLK(dev, con, ck) \ macro
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/drivers/net/ethernet/cadence/ |
D | macb_main.c | 2548 config = GEM_BF(CLK, GEM_CLK_DIV8); in gem_mdc_clk_div() 2550 config = GEM_BF(CLK, GEM_CLK_DIV16); in gem_mdc_clk_div() 2552 config = GEM_BF(CLK, GEM_CLK_DIV32); in gem_mdc_clk_div() 2554 config = GEM_BF(CLK, GEM_CLK_DIV48); in gem_mdc_clk_div() 2556 config = GEM_BF(CLK, GEM_CLK_DIV64); in gem_mdc_clk_div() 2558 config = GEM_BF(CLK, GEM_CLK_DIV96); in gem_mdc_clk_div() 2573 config = MACB_BF(CLK, MACB_CLK_DIV8); in macb_mdc_clk_div() 2575 config = MACB_BF(CLK, MACB_CLK_DIV16); in macb_mdc_clk_div() 2577 config = MACB_BF(CLK, MACB_CLK_DIV32); in macb_mdc_clk_div() 2579 config = MACB_BF(CLK, MACB_CLK_DIV64); in macb_mdc_clk_div() [all …]
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/drivers/media/dvb-frontends/ |
D | bcm3510_priv.h | 138 u8 CLK :1; member
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/drivers/video/fbdev/via/ |
D | hw.h | 630 void viafb_set_vclock(u32 CLK, int set_iga);
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/drivers/pinctrl/tegra/ |
D | pinctrl-tegra210.c | 1440 …PINGROUP(clk_32k_in, CLK, RSVD1, RSVD2, RSVD3, 0x3160, N, N, N, 0x…
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D | pinctrl-tegra114.c | 1751 …PINGROUP(clk_32k_in, CLK, RSVD2, RSVD3, RSVD4, 0x3330, N, N…
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D | pinctrl-tegra124.c | 1948 …PINGROUP(clk_32k_in, CLK, RSVD2, RSVD3, RSVD4, 0x3330, N, N…
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