| /drivers/media/pci/cx18/ |
| D | cx18-mailbox.c | 36 API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
37 API_ENTRY(CPU, CX18_EPU_DEBUG, 0),
38 API_ENTRY(CPU, CX18_CREATE_TASK, 0),
39 API_ENTRY(CPU, CX18_DESTROY_TASK, 0),
40 API_ENTRY(CPU, CX18_CPU_CAPTURE_START, API_SLOW),
41 API_ENTRY(CPU, CX18_CPU_CAPTURE_STOP, API_SLOW),
42 API_ENTRY(CPU, CX18_CPU_CAPTURE_PAUSE, 0),
43 API_ENTRY(CPU, CX18_CPU_CAPTURE_RESUME, 0),
44 API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
45 API_ENTRY(CPU, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 0),
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| /drivers/cpufreq/ |
| D | Kconfig | 2 menu "CPU Frequency scaling"
5 bool "CPU Frequency scaling"
8 CPU Frequency scaling allows you to change the clock speed of
10 the lower the CPU clock speed, the less power the CPU consumes.
12 Note that this driver doesn't automatically change the CPU
32 bool "CPU frequency transition statistics"
34 Export CPU frequency statistics information through sysfs.
39 bool "CPU frequency time-in-state statistics"
41 Export CPU time-in-state information through procfs.
61 the CPU.
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| D | Kconfig.arm | 3 # ARM CPU Frequency scaling drivers
14 is based on an abstract continuous scale of CPU
68 protocol for CPU power management.
71 firmware providing the CPU DVFS functionality.
130 tristate "CPU Frequency scaling support for MediaTek SoCs"
222 CPU Frequency scaling support for S3C2410
230 CPU Frequency scaling support for S3C2412 and S3C2413 SoC CPUs.
233 bool "S3C2416 CPU Frequency scaling support"
240 core voltage of the CPU.
248 Enable CPU voltage scaling when entering the dvs mode.
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| D | Kconfig.powerpc | 51 tristate "CPU frequency scaling for IBM POWERNV platform"
55 This adds support for CPU frequency switching on IBM POWERNV
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| /drivers/cpuidle/ |
| D | Kconfig.arm | 3 # ARM CPU Idle drivers
6 bool "Generic ARM/ARM64 CPU idle Driver"
13 initialized by calling the CPU operations init idle hook
17 bool "PSCI CPU idle Driver"
27 bool "PSCI CPU idle Domain"
44 Select this option to enable CPU idle driver for big.LITTLE based
47 multiple CPU idle drivers infrastructure.
50 bool "CPU Idle Driver for CLPS711X processors"
56 bool "CPU Idle Driver for Calxeda processors"
63 bool "CPU Idle Driver for Marvell Kirkwood SoCs"
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| D | Kconfig | 2 menu "CPU Idle"
5 bool "CPU idle PM support"
10 CPU idle is a generic framework for supporting software-controlled
50 menu "ARM CPU Idle Drivers"
55 menu "MIPS CPU Idle Drivers"
60 menu "POWERPC CPU Idle Drivers"
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| D | Kconfig.mips | 3 # MIPS CPU Idle Drivers
6 bool "CPU Idle driver for MIPS CPS platforms"
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| D | Kconfig.powerpc | 3 # POWERPC CPU Idle Drivers
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| /drivers/soc/tegra/ |
| D | Kconfig | 22 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
36 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
48 ARM CortexA15MP CPU
59 ARM CortexA15MP CPU
73 ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC,
74 but contains an NVIDIA Denver CPU complex in place of
75 Tegra124's "4+1" Cortex-A15 CPU complex.
105 combination of Denver and Cortex-A57 CPU cores and a GPU based on
106 the Pascal architecture. It contains an ADSP with a Cortex-A9 CPU
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| /drivers/firmware/tegra/ |
| D | Kconfig | 11 keeps the content is synchronization between host CPU and remote
19 the PM functions which include clock/DVFS/thermal/power from the CPU.
23 This driver manages the IPC interface between host CPU and the
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| /drivers/powercap/ |
| D | Kconfig | 35 controller, CPU core (Power Plane 0), graphics uncore (Power Plane
47 on a per CPU basis.
56 bool "Add CPU power capping based on the energy model"
59 This enables support for CPU power limitation based on
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| /drivers/clk/mxs/ |
| D | clk-imx23.c | 23 #define CPU (CLKCTRL + 0x0020) macro
49 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); in clk_misc_init()
125 clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28); in mx23_clocks_init()
126 clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29); in mx23_clocks_init()
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| D | clk-imx28.c | 23 #define CPU (CLKCTRL + 0x0050) macro
84 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); in clk_misc_init()
190 clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28); in mx28_clocks_init()
191 clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29); in mx28_clocks_init()
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| /drivers/crypto/vmx/ |
| D | Kconfig | 3 tristate "Encryption acceleration support on P8 CPU"
12 Support for VMX cryptographic acceleration instructions on Power8 CPU.
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| /drivers/clk/meson/ |
| D | Kconfig | 58 want peripherals and CPU frequency scaling to work.
74 Say Y if you want peripherals and CPU frequency scaling to work.
89 Say Y if you want peripherals and CPU frequency scaling to work.
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| /drivers/platform/mips/ |
| D | Kconfig | 20 bool "Loongson-3 CPU HWMon Driver"
25 Loongson-3A/3B CPU Hwmon (temperature sensor) driver.
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| /drivers/dma/mediatek/ |
| D | Kconfig | 13 memory-to-memory transfer to offload from CPU through ring-
27 memory-to-memory transfer to offload from CPU.
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| /drivers/clk/qcom/ |
| D | Kconfig | 27 the CPU with frequencies above 1GHz.
28 Say Y if you want to support higher CPU frequencies on MSM8916
34 Support for the A7 PLL on SDX55 devices. It provides the CPU with
36 Say Y if you want to support higher CPU frequencies on SDX55
45 Say Y if you want to support CPU frequency scaling on devices
49 tristate "MSM8996 CPU Clock Controller"
53 Support for the CPU clock controller on msm8996 devices.
54 Say Y if you want to support CPU clock scaling using CPUfreq
63 Say Y if you want to support CPU frequency scaling on devices
123 Say Y if you want to support CPU frequency scaling on ipq based
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| /drivers/leds/trigger/ |
| D | Kconfig | 52 This allows LEDs to be controlled by a CPU load average.
66 bool "LED CPU Trigger"
77 This allows LEDs to be controlled by an immediate CPU usage.
79 intense brightness depending on the instant CPU load.
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| /drivers/thermal/intel/ |
| D | Kconfig | 22 Enable this to register CPU digital sensor for package temperature as
45 addition to DTSs on CPU cores. Each DTS will be registered as a
92 on how fast the setting takes effect, and how much the CPU frequency
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| /drivers/hwtracing/coresight/ |
| D | Kconfig | 107 version 4.x and the Embedded Trace Extensions (ETE). Both are CPU tracer
137 tristate "CoreSight CPU Debug driver"
154 bool "Enable CoreSight CPU Debug by default"
198 Unlike traditional sink devices, TRBE is a CPU feature accessible via
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| /drivers/thermal/ |
| D | Kconfig | 166 Enable the CPU cooling features. If the system has no active
167 cooling device available, this option allows to use the CPU
173 bool "CPU frequency cooling device"
184 bool "CPU idle cooling device"
187 This implements the CPU cooling mechanism through
188 idle injection. This will throttle the CPU by injecting
476 thermal framework. The driver supports CPU thermal zone temperature
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| /drivers/clk/imgtec/ |
| D | Kconfig | 7 Enable this to support the system & CPU clocks on the MIPS Boston
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| /drivers/gpu/drm/kmb/ |
| D | Kconfig | 11 an ARM Cortex A53 CPU with an Intel Movidius VPU.
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| /drivers/soc/sunxi/ |
| D | Kconfig | 20 whether to the CPU/DMA, or to the devices.
|