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Searched refs:CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h2672 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK 0x000000f0L macro
Dgfx_7_2_sh_mask.h3237 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK 0xf0 macro
Dgfx_8_0_sh_mask.h3857 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK 0xf0 macro
Dgfx_8_1_sh_mask.h4379 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK 0xf0 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h21093 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK … macro
Dgc_9_1_sh_mask.h22404 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK … macro
Dgc_9_2_1_sh_mask.h22343 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK … macro
Dgc_9_4_2_sh_mask.h16134 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK … macro
Dgc_10_1_0_sh_mask.h30811 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK … macro
Dgc_10_3_0_sh_mask.h29128 #define CP_PERFMON_CNTL__SPM_PERFMON_STATE_MASK … macro