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Searched refs:CP_RB0_RPTR_ADDR__RB_RPTR_ADDR_MASK (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h2730 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR_MASK 0xfffffffcL macro
Dgfx_7_2_sh_mask.h1113 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR_MASK 0xfffffffc macro
Dgfx_8_0_sh_mask.h1429 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR_MASK 0xfffffffc macro
Dgfx_8_1_sh_mask.h1953 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR_MASK 0xfffffffc macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h10726 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro
Dgc_9_1_sh_mask.h12207 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro
Dgc_9_2_1_sh_mask.h12012 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro
Dgc_9_4_2_sh_mask.h2028 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro
Dgc_10_1_0_sh_mask.h17647 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro
Dgc_10_3_0_sh_mask.h15907 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro