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Searched refs:DAVINCI_MMCCLK (Results 1 – 1 of 1) sorted by relevance

/drivers/mmc/host/
Ddavinci_mmc.c34 #define DAVINCI_MMCCLK 0x04 /* Memory Clock Control Register */ macro
658 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK; in calculate_clk_divider()
660 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
671 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKEN; in calculate_clk_divider()
672 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
676 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK; in calculate_clk_divider()
678 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
680 writel(temp | MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
1112 writel(0, host->base + DAVINCI_MMCCLK); in init_mmcsd_host()
1113 writel(MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK); in init_mmcsd_host()