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Searched refs:DCHUBBUB_GLOBAL_TIMER_CNTL (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dce/
Ddce_hwseq.h165 SR(DCHUBBUB_GLOBAL_TIMER_CNTL), \
363 SR(DCHUBBUB_GLOBAL_TIMER_CNTL), \
552 uint32_t DCHUBBUB_GLOBAL_TIMER_CNTL; member
722 HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, mask_sh), \
778 HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \
837 HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \
885 HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \
928 HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \
979 HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hubbub.h48 SR(DCHUBBUB_GLOBAL_TIMER_CNTL), \
104 uint32_t DCHUBBUB_GLOBAL_TIMER_CNTL; member
168 HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, mask_sh), \
Ddcn10_hw_sequencer.c1353 REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1); in dcn10_init_hw()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hubbub.h60 HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \
Ddcn20_hubbub.c547 REG_GET_2(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, &ref_div, in hubbub2_get_dchub_ref_freq()
Ddcn20_hwseq.c2493 REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, 2); in dcn20_fpga_init_hw()
2494 REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1); in dcn20_fpga_init_hw()
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_hubbub.h56 HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \
Ddcn30_hwseq.c454 REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1); in dcn30_init_hw()
/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_hubbub.h57 HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \
Ddcn31_hwseq.c82 REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1); in dcn31_init_hw()
Ddcn31_resource.c753 SR(DCHUBBUB_GLOBAL_TIMER_CNTL), \
814 HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \
Ddcn31_hubbub.c925 REG_GET_2(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, &ref_div, in hubbub31_get_dchub_ref_freq()
/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubbub.h105 HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \