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Searched refs:DC_LOG_DEBUG (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubp.c262 DC_LOG_DEBUG("DML Validation | Running Validation"); in hubp21_validate_dml_output()
291 …DC_LOG_DEBUG("DML Validation | HUBPRET_CONTROL:DET_BUF_PLANE1_BASE_ADDRESS - Expected: %u Actual:… in hubp21_validate_dml_output()
294 …DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:DRQ_EXPANSION_MODE - Expected: %u Actual: %u\n", in hubp21_validate_dml_output()
297 …DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:MRQ_EXPANSION_MODE - Expected: %u Actual: %u\n", in hubp21_validate_dml_output()
300 …DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:DET_BUF_PLANE1_BASE_ADDRESS - Expected: %u Actu… in hubp21_validate_dml_output()
303 …DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:CRQ_EXPANSION_MODE - Expected: %u Actual: %u\n", in hubp21_validate_dml_output()
307 DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:CHUNK_SIZE - Expected: %u Actual: %u\n", in hubp21_validate_dml_output()
310 …DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:MIN_CHUNK_SIZE - Expected: %u Actual: %u\… in hubp21_validate_dml_output()
313 …DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:META_CHUNK_SIZE - Expected: %u Actual: %u… in hubp21_validate_dml_output()
316 …DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:MIN_META_CHUNK_SIZE - Expected: %u Actual… in hubp21_validate_dml_output()
[all …]
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hubp.c1299 DC_LOG_DEBUG("DML Validation | Running Validation"); in hubp2_validate_dml_output()
1329 …DC_LOG_DEBUG("DML Validation | HUBPRET_CONTROL:DET_BUF_PLANE1_BASE_ADDRESS - Expected: %u Actual:… in hubp2_validate_dml_output()
1332 …DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:DRQ_EXPANSION_MODE - Expected: %u Actual: %u\n", in hubp2_validate_dml_output()
1335 …DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:MRQ_EXPANSION_MODE - Expected: %u Actual: %u\n", in hubp2_validate_dml_output()
1338 …DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:DET_BUF_PLANE1_BASE_ADDRESS - Expected: %u Actu… in hubp2_validate_dml_output()
1341 …DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:CRQ_EXPANSION_MODE - Expected: %u Actual: %u\n", in hubp2_validate_dml_output()
1345 DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:CHUNK_SIZE - Expected: %u Actual: %u\n", in hubp2_validate_dml_output()
1348 …DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:MIN_CHUNK_SIZE - Expected: %u Actual: %u\… in hubp2_validate_dml_output()
1351 …DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:META_CHUNK_SIZE - Expected: %u Actual: %u… in hubp2_validate_dml_output()
1354 …DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:MIN_META_CHUNK_SIZE - Expected: %u Actual… in hubp2_validate_dml_output()
[all …]
Ddcn20_hwseq.c1075 DC_LOG_DEBUG( in dcn20_power_on_plane()
2262 DC_LOG_DEBUG("Reset back end for pipe %d, tg:%d\n", in dcn20_reset_back_end_for_pipe()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Ddcn301_smu.c120 DC_LOG_DEBUG("%s %x\n", __func__, smu_version); in dcn301_smu_get_smu_version()
130 DC_LOG_DEBUG("%s(%d)\n", __func__, requested_dispclk_khz); in dcn301_smu_set_dispclk()
145 DC_LOG_DEBUG("%s %d\n", __func__, clk_mgr->base.dprefclk_khz / 1000); in dcn301_smu_set_dprefclk()
161 DC_LOG_DEBUG("%s(%d)\n", __func__, requested_dcfclk_khz); in dcn301_smu_set_hard_min_dcfclk()
175 DC_LOG_DEBUG("%s(%d)\n", __func__, requested_min_ds_dcfclk_khz); in dcn301_smu_set_min_deep_sleep_dcfclk()
189 DC_LOG_DEBUG("%s(%d)\n", __func__, requested_dpp_khz); in dcn301_smu_set_dppclk()
203 DC_LOG_DEBUG("%s(%x)\n", __func__, idle_info); in dcn301_smu_set_display_idle_optimization()
220 DC_LOG_DEBUG("%s(%d)\n", __func__, enable); in dcn301_smu_enable_phy_refclk_pwrdwn()
238 DC_LOG_DEBUG("%s(%x)\n", __func__, addr_high); in dcn301_smu_set_dram_addr_high()
246 DC_LOG_DEBUG("%s(%x)\n", __func__, addr_low); in dcn301_smu_set_dram_addr_low()
/drivers/gpu/drm/amd/display/dc/
Ddc_dmub_srv.c139 DC_LOG_DEBUG("No reply for DMUB command: status=%d\n", status); in dc_dmub_srv_cmd_with_reply_data()
243 DC_LOG_DEBUG( in dc_dmub_srv_log_diagnostic_data()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_stream_encoder.c525 DC_LOG_DEBUG("HDMI source set to 24BPP deep color depth\n"); in enc1_stream_encoder_hdmi_set_stream_attribute()
532 DC_LOG_DEBUG("HDMI source 30BPP deep color depth" \ in enc1_stream_encoder_hdmi_set_stream_attribute()
538 DC_LOG_DEBUG("HDMI source 30BPP deep color depth" \ in enc1_stream_encoder_hdmi_set_stream_attribute()
547 DC_LOG_DEBUG("HDMI source 36BPP deep color depth" \ in enc1_stream_encoder_hdmi_set_stream_attribute()
553 DC_LOG_DEBUG("HDMI source 36BPP deep color depth" \ in enc1_stream_encoder_hdmi_set_stream_attribute()
561 DC_LOG_DEBUG("HDMI source deep color depth enabled in" \ in enc1_stream_encoder_hdmi_set_stream_attribute()
Ddcn10_hw_sequencer.c683 DC_LOG_DEBUG( in power_on_plane()
992 DC_LOG_DEBUG("Reset back end for pipe %d, tg:%d\n", in dcn10_reset_back_end_for_pipe()
1167 DC_LOG_DEBUG( in dcn10_plane_atomic_power_down()
/drivers/gpu/drm/amd/display/include/
Dlogger_types.h35 #define DC_LOG_DEBUG(...) DRM_DEBUG_KMS(__VA_ARGS__) macro
/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_hwseq.c563 DC_LOG_DEBUG("Reset back end for pipe %d, tg:%d\n", in dcn31_reset_back_end_for_pipe()
/drivers/gpu/drm/amd/display/dc/core/
Ddc_link.c2113 DC_LOG_DEBUG("Set retimer failed"); in write_i2c_retimer_setting()
2236 DC_LOG_DEBUG("Set default retimer failed"); in write_i2c_default_retimer_setting()
2265 DC_LOG_DEBUG("Set redriver failed"); in write_i2c_redriver_setting()
Ddc_link_dp.c3076 DC_LOG_DEBUG("%s: original bpc %d, changing to %d\n", in dp_test_send_link_test_pattern()
/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_resource.c1913 DC_LOG_DEBUG("%s: fusing pipe %d\n", __func__, i); in dcn301_resource_construct()