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Searched refs:DPIO_CH0 (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/i915/gvt/
Dhandlers.c543 enum dpio_channel ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
551 ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
555 ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
3509 MMIO_D(BXT_PORT_PLL_EBB_0(DPIO_PHY0, DPIO_CH0), D_BXT); in init_bxt_mmio_info()
3510 MMIO_D(BXT_PORT_PLL_EBB_4(DPIO_PHY0, DPIO_CH0), D_BXT); in init_bxt_mmio_info()
3511 MMIO_D(BXT_PORT_PCS_DW10_LN01(DPIO_PHY0, DPIO_CH0), D_BXT); in init_bxt_mmio_info()
3512 MMIO_D(BXT_PORT_PCS_DW10_GRP(DPIO_PHY0, DPIO_CH0), D_BXT); in init_bxt_mmio_info()
3513 MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY0, DPIO_CH0), D_BXT); in init_bxt_mmio_info()
3514 MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY0, DPIO_CH0), D_BXT); in init_bxt_mmio_info()
3515 MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
[all …]
/drivers/gpu/drm/i915/display/
Dintel_dpio_phy.c168 [DPIO_CH0] = { .port = PORT_B },
178 [DPIO_CH0] = { .port = PORT_A },
191 [DPIO_CH0] = { .port = PORT_B },
201 [DPIO_CH0] = { .port = PORT_A },
211 [DPIO_CH0] = { .port = PORT_C },
249 if (port == phy_info->channel[DPIO_CH0].port) { in bxt_port_to_phy_channel()
251 *ch = DPIO_CH0; in bxt_port_to_phy_channel()
266 *ch = DPIO_CH0; in bxt_port_to_phy_channel()
806 if (ch == DPIO_CH0 && pipe == PIPE_B) in chv_phy_pre_pll_enable()
821 if (ch == DPIO_CH0) in chv_phy_pre_pll_enable()
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Dintel_display_power.c1546 phy_status_mask &= ~(PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0) | in assert_chv_phy_status()
1547 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0) | in assert_chv_phy_status()
1548 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1) | in assert_chv_phy_status()
1554 phy_status_mask &= ~(PHY_STATUS_CMN_LDO(DPIO_PHY1, DPIO_CH0) | in assert_chv_phy_status()
1555 PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 0) | in assert_chv_phy_status()
1556 PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 1)); in assert_chv_phy_status()
1562 if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0)) == 0) in assert_chv_phy_status()
1563 phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0); in assert_chv_phy_status()
1570 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0) | in assert_chv_phy_status()
1572 phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0); in assert_chv_phy_status()
[all …]
Dintel_display_types.h1723 return DPIO_CH0; in vlv_dig_port_to_channel()
1751 return DPIO_CH0; in vlv_pipe_to_channel()
Dintel_display.h279 DPIO_CH0, enumerator