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Searched refs:DPLLB_LVDS_P2_CLOCK_DIV_7 (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/gma500/
Dpsb_intel_display.c173 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in psb_intel_crtc_mode_set()
Dpsb_intel_reg.h239 #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro
/drivers/gpu/drm/i915/display/
Dintel_dpll.c841 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in i9xx_compute_dpll()
1030 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in ilk_compute_dpll()
Dintel_display.c6600 clock.p2 = dpll & DPLLB_LVDS_P2_CLOCK_DIV_7 ? in i9xx_crtc_clock_get()
/drivers/gpu/drm/i915/
Di915_reg.h3505 #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro