Searched refs:DRAM_PHYS_BASE (Results 1 – 8 of 8) sorted by relevance
24 #define DRAM_PHYS_BASE 0x0ull macro
32 #define DRAM_PHYS_BASE 0x0ull macro
395 prop->dram_base_address = DRAM_PHYS_BASE; in goya_set_fixed_properties()556 inbound_region.addr = DRAM_PHYS_BASE; in goya_init_iatu()885 region->region_base = DRAM_PHYS_BASE; in goya_set_pci_memory_regions()910 goya->ddr_bar_cur_addr = DRAM_PHYS_BASE; in goya_sw_init()2532 if (goya_set_ddr_bar_base(hdev, DRAM_PHYS_BASE) == U64_MAX) { in goya_init_cpu()2729 goya_set_ddr_bar_base(hdev, DRAM_PHYS_BASE); in goya_hw_fini()4201 } else if (addr < DRAM_PHYS_BASE + hdev->asic_prop.dram_size) { in goya_debugfs_read32()4203 u64 bar_base_addr = DRAM_PHYS_BASE + in goya_debugfs_read32()4261 } else if (addr < DRAM_PHYS_BASE + hdev->asic_prop.dram_size) { in goya_debugfs_write32()4263 u64 bar_base_addr = DRAM_PHYS_BASE + in goya_debugfs_write32()[all …]
71 #define CPU_FW_IMAGE_ADDR DRAM_PHYS_BASE
2384 u32 dram_addr_lo = lower_32_bits(DRAM_PHYS_BASE); in goya_init_security()2385 u32 dram_addr_hi = upper_32_bits(DRAM_PHYS_BASE); in goya_init_security()
133 #define CPU_FW_IMAGE_ADDR DRAM_PHYS_BASE
577 prop->dram_base_address = DRAM_PHYS_BASE; in gaudi_set_fixed_properties()740 inbound_region.addr = DRAM_PHYS_BASE; in gaudi_init_iatu()1795 region->region_base = DRAM_PHYS_BASE; in gaudi_set_pci_memory_regions()4167 gaudi->hbm_bar_cur_addr = DRAM_PHYS_BASE; in gaudi_hw_init()4173 if (gaudi_set_hbm_bar_base(hdev, DRAM_PHYS_BASE) == U64_MAX) { in gaudi_hw_init()6179 } else if (addr < DRAM_PHYS_BASE + hdev->asic_prop.dram_size) { in gaudi_debugfs_read32()6180 u64 bar_base_addr = DRAM_PHYS_BASE + in gaudi_debugfs_read32()6230 } else if (addr < DRAM_PHYS_BASE + hdev->asic_prop.dram_size) { in gaudi_debugfs_write32()6231 u64 bar_base_addr = DRAM_PHYS_BASE + in gaudi_debugfs_write32()6285 DRAM_PHYS_BASE + hdev->asic_prop.dram_size - sizeof(u64)) { in gaudi_debugfs_read64()[all …]
12934 u32 dram_addr_lo = lower_32_bits(DRAM_PHYS_BASE); in gaudi_init_range_registers_hbw()12935 u32 dram_addr_hi = upper_32_bits(DRAM_PHYS_BASE); in gaudi_init_range_registers_hbw()