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Searched refs:DSCC_PPS_CONFIG1 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dsc.c159 REG_GET(DSCC_PPS_CONFIG1, BITS_PER_PIXEL, &s->dsc_bits_per_pixel); in dsc2_read_state()
161 REG_GET(DSCC_PPS_CONFIG1, CHUNK_SIZE, &s->dsc_chunk_size); in dsc2_read_state()
591 REG_SET_7(DSCC_PPS_CONFIG1, 0, in dsc_write_to_registers()
Ddcn20_dsc.h42 SRI(DSCC_PPS_CONFIG1, DSCC, id),\
457 uint32_t DSCC_PPS_CONFIG1; member