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Searched refs:GET (Results 1 – 7 of 7) sorted by relevance

/drivers/atm/
Dsuni.c41 #define GET(reg) dev->ops->phy_get(dev,SUNI_##reg) macro
43 PUT((GET(reg) & ~(mask)) | ((value) << (shift)),reg)
67 ADD_LIMITED(section_bip,(GET(RSOP_SBL) & 0xff) | in suni_hz()
68 ((GET(RSOP_SBM) & 0xff) << 8)); in suni_hz()
69 ADD_LIMITED(line_bip,(GET(RLOP_LBL) & 0xff) | in suni_hz()
70 ((GET(RLOP_LB) & 0xff) << 8) | in suni_hz()
71 ((GET(RLOP_LBM) & 0xf) << 16)); in suni_hz()
72 ADD_LIMITED(path_bip,(GET(RPOP_PBL) & 0xff) | in suni_hz()
73 ((GET(RPOP_PBM) & 0xff) << 8)); in suni_hz()
74 ADD_LIMITED(line_febe,(GET(RLOP_LFL) & 0xff) | in suni_hz()
[all …]
DuPD98402.c38 #define GET(reg) dev->ops->phy_get(dev,uPD98402_##reg) macro
46 atomic_add(GET(HECCT),&PRIV(dev)->sonet_stats.uncorr_hcs); in fetch_stats()
80 PUT((GET(MDR) & ~uPD98402_MDR_SS_MASK) | (set[3] << in set_framing()
93 s[0] = GET(C11R); in get_sense()
94 s[1] = GET(C12R); in get_sense()
95 s[2] = GET(C13R); in get_sense()
107 mode_reg = GET(MDR) & ~(uPD98402_MDR_TPLP | uPD98402_MDR_ALP | in set_loopback()
165 { atomic_add(GET(v),&PRIV(dev)->sonet_stats.s); \
174 events = GET(PCR); in stat_event()
191 while ((reason = GET(PICR))) { in uPD98402_int()
[all …]
Didt77105.c47 #define GET(reg) dev->ops->phy_get(dev,IDT77105_##reg) macro
69 val = GET(CTRLO); in get_counter()
71 val |= GET(CTRHI)<<8; in get_counter()
126 istat = GET(ISTAT); /* side effect: clears all interrupt status bits */ in idt77105_restart_timer_func()
133 PUT( GET(DIAG) | IDT77105_DIAG_RFLUSH, DIAG); in idt77105_restart_timer_func()
163 diag = GET(DIAG) & ~IDT77105_DIAG_LCMASK; in set_loopback()
217 istat = GET(ISTAT); /* side effect: clears all interrupt status bits */ in idt77105_int()
231 PRIV(dev)->old_mcr = GET(MCR); in idt77105_int()
246 PUT( GET(DIAG) | IDT77105_DIAG_RFLUSH, DIAG); in idt77105_int()
276 GET(ISTAT) & IDT77105_ISTAT_GOODSIG ? in idt77105_start()
[all …]
/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/
Dcom.fuc35 ld b32 $r8 D[$r13 + 0x0] // GET
69 ld b32 $r8 D[$r13 + 0x0] // GET
81 // update GET
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
Dhost.fuc83 // increment GET
/drivers/net/fddi/skfp/h/
Dskfbi.h806 #define GET(io,mask) (inpw(io)&(mask)) macro
/drivers/gpu/drm/nouveau/dispnv50/
Ddisp.c159 u32 get = NVIF_RV32(&dmac->base.user, NV507C, GET, PTR); in nv50_dmac_free()
171 u32 get = NVIF_RV32(&dmac->base.user, NV507C, GET, PTR); in nv50_dmac_wind()
178 if (NVIF_TV32(&dmac->base.user, NV507C, GET, PTR, >, 0)) in nv50_dmac_wind()