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Searched refs:HDMI_WRITE (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/vc4/
Dvc4_hdmi_phy.c137 HDMI_WRITE(HDMI_TX_PHY_RESET_CTL, 0xf << 16); in vc4_hdmi_phy_init()
138 HDMI_WRITE(HDMI_TX_PHY_RESET_CTL, 0); in vc4_hdmi_phy_init()
143 HDMI_WRITE(HDMI_TX_PHY_RESET_CTL, 0xf << 16); in vc4_hdmi_phy_disable()
148 HDMI_WRITE(HDMI_TX_PHY_CTL_0, in vc4_hdmi_phy_rng_enable()
155 HDMI_WRITE(HDMI_TX_PHY_CTL_0, in vc4_hdmi_phy_rng_disable()
339 HDMI_WRITE(HDMI_TX_PHY_RESET_CTL, 0x0f); in vc5_hdmi_reset_phy()
340 HDMI_WRITE(HDMI_TX_PHY_POWERDOWN_CTL, BIT(10)); in vc5_hdmi_reset_phy()
357 HDMI_WRITE(HDMI_TX_PHY_POWERDOWN_CTL, in vc5_hdmi_phy_init()
360 HDMI_WRITE(HDMI_TX_PHY_RESET_CTL, in vc5_hdmi_phy_init()
367 HDMI_WRITE(HDMI_RM_CONTROL, in vc5_hdmi_phy_init()
[all …]
Dvc4_hdmi.c125 HDMI_WRITE(HDMI_M_CTL, VC4_HD_M_SW_RST); in vc4_hdmi_reset()
127 HDMI_WRITE(HDMI_M_CTL, 0); in vc4_hdmi_reset()
129 HDMI_WRITE(HDMI_M_CTL, VC4_HD_M_ENABLE); in vc4_hdmi_reset()
131 HDMI_WRITE(HDMI_SW_RESET_CONTROL, in vc4_hdmi_reset()
135 HDMI_WRITE(HDMI_SW_RESET_CONTROL, 0); in vc4_hdmi_reset()
142 HDMI_WRITE(HDMI_DVP_CTL, 0); in vc5_hdmi_reset()
144 HDMI_WRITE(HDMI_CLOCK_STOP, in vc5_hdmi_reset()
163 HDMI_WRITE(HDMI_CEC_CNTRL_1, value); in vc4_hdmi_cec_update_clk_div()
380 HDMI_WRITE(HDMI_RAM_PACKET_CONFIG, in vc4_hdmi_stop_packet()
433 HDMI_WRITE(HDMI_RAM_PACKET_CONFIG, in vc4_hdmi_write_infoframe()
[all …]
Dvc4_hdmi_regs.h457 #define HDMI_WRITE(reg, val) vc4_hdmi_write(vc4_hdmi, reg, val) macro
/drivers/gpu/drm/gma500/
Doaktrail_hdmi_i2c.c36 #define HDMI_WRITE(reg, val) writel(val, hdmi_dev->regs + (reg)) macro
83 HDMI_WRITE(HDMI_HICR, temp); in hdmi_i2c_irq_enable()
89 HDMI_WRITE(HDMI_HICR, 0x0); in hdmi_i2c_irq_disable()
106 HDMI_WRITE(HDMI_HI2CHCR, temp); in xfer_read()
135 HDMI_WRITE(HDMI_ICRH, 0x00008760); in oaktrail_hdmi_i2c_access()
192 HDMI_WRITE(HDMI_HISR, temp | HDMI_INTR_I2C_FULL); in hdmi_i2c_read()
197 HDMI_WRITE(HDMI_HI2CHCR, temp | HI2C_READ_CONTINUE); in hdmi_i2c_read()
211 HDMI_WRITE(HDMI_HISR, temp | HDMI_INTR_I2C_DONE); in hdmi_i2c_transaction_done()
216 HDMI_WRITE(HDMI_HI2CHCR, temp & ~HI2C_ENABLE_TRANSACTION); in hdmi_i2c_transaction_done()
232 HDMI_WRITE(HDMI_HISR, stat | HDMI_INTR_HPD); in oaktrail_hdmi_i2c_handler()
Doaktrail_hdmi.c37 #define HDMI_WRITE(reg, val) writel(val, hdmi_dev->regs + (reg)) macro
136 HDMI_WRITE(HDMI_HCR, 0x67); in oaktrail_hdmi_audio_enable()
139 HDMI_WRITE(0x51a8, 0x10); in oaktrail_hdmi_audio_enable()
142 HDMI_WRITE(HDMI_AUDIO_CTRL, 0x1); in oaktrail_hdmi_audio_enable()
151 HDMI_WRITE(0x51a8, 0x0); in oaktrail_hdmi_audio_disable()
154 HDMI_WRITE(HDMI_AUDIO_CTRL, 0x0); in oaktrail_hdmi_audio_disable()
157 HDMI_WRITE(HDMI_HCR, 0x47); in oaktrail_hdmi_audio_disable()
320 HDMI_WRITE(0x1004, 0x1fd); in oaktrail_crtc_hdmi_mode_set()
321 HDMI_WRITE(0x2000, 0x1); in oaktrail_crtc_hdmi_mode_set()
322 HDMI_WRITE(0x2008, 0x0); in oaktrail_crtc_hdmi_mode_set()
[all …]