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Searched refs:HZIP_CLOCK_GATE_CTRL (Results 1 – 1 of 1) sorted by relevance

/drivers/crypto/hisilicon/zip/
Dzip_main.c23 #define HZIP_CLOCK_GATE_CTRL 0x301004 macro
331 val = readl(qm->io_base + HZIP_CLOCK_GATE_CTRL); in hisi_zip_enable_clock_gate()
333 writel(val, qm->io_base + HZIP_CLOCK_GATE_CTRL); in hisi_zip_enable_clock_gate()
380 base + HZIP_CLOCK_GATE_CTRL); in hisi_zip_set_user_domain_and_cache()