Searched refs:MIPI_PLL_N_NUM_7_0 (Results 1 – 2 of 2) sorted by relevance
222 #define MIPI_PLL_N_NUM_7_0 0x23 macro
490 ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, MIPI_PLL_N_NUM_7_0, in anx7625_dsi_video_timing_config()