1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Marvell RVU Admin Function driver 3 * 4 * Copyright (C) 2018 Marvell. 5 * 6 */ 7 8 #ifndef NPC_H 9 #define NPC_H 10 11 enum NPC_LID_E { 12 NPC_LID_LA = 0, 13 NPC_LID_LB, 14 NPC_LID_LC, 15 NPC_LID_LD, 16 NPC_LID_LE, 17 NPC_LID_LF, 18 NPC_LID_LG, 19 NPC_LID_LH, 20 }; 21 22 #define NPC_LT_NA 0 23 24 enum npc_kpu_la_ltype { 25 NPC_LT_LA_8023 = 1, 26 NPC_LT_LA_ETHER, 27 NPC_LT_LA_IH_NIX_ETHER, 28 NPC_LT_LA_IH_8_ETHER, 29 NPC_LT_LA_IH_4_ETHER, 30 NPC_LT_LA_IH_2_ETHER, 31 NPC_LT_LA_HIGIG2_ETHER, 32 NPC_LT_LA_IH_NIX_HIGIG2_ETHER, 33 NPC_LT_LA_CUSTOM_L2_90B_ETHER, 34 NPC_LT_LA_CPT_HDR, 35 NPC_LT_LA_CUSTOM_L2_24B_ETHER, 36 NPC_LT_LA_CUSTOM_PRE_L2_ETHER, 37 NPC_LT_LA_CUSTOM0 = 0xE, 38 NPC_LT_LA_CUSTOM1 = 0xF, 39 }; 40 41 enum npc_kpu_lb_ltype { 42 NPC_LT_LB_ETAG = 1, 43 NPC_LT_LB_CTAG, 44 NPC_LT_LB_STAG_QINQ, 45 NPC_LT_LB_BTAG, 46 NPC_LT_LB_PPPOE, 47 NPC_LT_LB_DSA, 48 NPC_LT_LB_DSA_VLAN, 49 NPC_LT_LB_EDSA, 50 NPC_LT_LB_EDSA_VLAN, 51 NPC_LT_LB_EXDSA, 52 NPC_LT_LB_EXDSA_VLAN, 53 NPC_LT_LB_FDSA, 54 NPC_LT_LB_VLAN_EXDSA, 55 NPC_LT_LB_CUSTOM0 = 0xE, 56 NPC_LT_LB_CUSTOM1 = 0xF, 57 }; 58 59 enum npc_kpu_lc_ltype { 60 NPC_LT_LC_IP = 1, 61 NPC_LT_LC_IP_OPT, 62 NPC_LT_LC_IP6, 63 NPC_LT_LC_IP6_EXT, 64 NPC_LT_LC_ARP, 65 NPC_LT_LC_RARP, 66 NPC_LT_LC_MPLS, 67 NPC_LT_LC_NSH, 68 NPC_LT_LC_PTP, 69 NPC_LT_LC_FCOE, 70 NPC_LT_LC_NGIO, 71 NPC_LT_LC_CUSTOM0 = 0xE, 72 NPC_LT_LC_CUSTOM1 = 0xF, 73 }; 74 75 /* Don't modify Ltypes upto SCTP, otherwise it will 76 * effect flow tag calculation and thus RSS. 77 */ 78 enum npc_kpu_ld_ltype { 79 NPC_LT_LD_TCP = 1, 80 NPC_LT_LD_UDP, 81 NPC_LT_LD_ICMP, 82 NPC_LT_LD_SCTP, 83 NPC_LT_LD_ICMP6, 84 NPC_LT_LD_CUSTOM0, 85 NPC_LT_LD_CUSTOM1, 86 NPC_LT_LD_IGMP = 8, 87 NPC_LT_LD_AH, 88 NPC_LT_LD_GRE, 89 NPC_LT_LD_NVGRE, 90 NPC_LT_LD_NSH, 91 NPC_LT_LD_TU_MPLS_IN_NSH, 92 NPC_LT_LD_TU_MPLS_IN_IP, 93 }; 94 95 enum npc_kpu_le_ltype { 96 NPC_LT_LE_VXLAN = 1, 97 NPC_LT_LE_GENEVE, 98 NPC_LT_LE_ESP, 99 NPC_LT_LE_GTPU = 4, 100 NPC_LT_LE_VXLANGPE, 101 NPC_LT_LE_GTPC, 102 NPC_LT_LE_NSH, 103 NPC_LT_LE_TU_MPLS_IN_GRE, 104 NPC_LT_LE_TU_NSH_IN_GRE, 105 NPC_LT_LE_TU_MPLS_IN_UDP, 106 NPC_LT_LE_CUSTOM0 = 0xE, 107 NPC_LT_LE_CUSTOM1 = 0xF, 108 }; 109 110 enum npc_kpu_lf_ltype { 111 NPC_LT_LF_TU_ETHER = 1, 112 NPC_LT_LF_TU_PPP, 113 NPC_LT_LF_TU_MPLS_IN_VXLANGPE, 114 NPC_LT_LF_TU_NSH_IN_VXLANGPE, 115 NPC_LT_LF_TU_MPLS_IN_NSH, 116 NPC_LT_LF_TU_3RD_NSH, 117 NPC_LT_LF_CUSTOM0 = 0xE, 118 NPC_LT_LF_CUSTOM1 = 0xF, 119 }; 120 121 enum npc_kpu_lg_ltype { 122 NPC_LT_LG_TU_IP = 1, 123 NPC_LT_LG_TU_IP6, 124 NPC_LT_LG_TU_ARP, 125 NPC_LT_LG_TU_ETHER_IN_NSH, 126 NPC_LT_LG_CUSTOM0 = 0xE, 127 NPC_LT_LG_CUSTOM1 = 0xF, 128 }; 129 130 /* Don't modify Ltypes upto SCTP, otherwise it will 131 * effect flow tag calculation and thus RSS. 132 */ 133 enum npc_kpu_lh_ltype { 134 NPC_LT_LH_TU_TCP = 1, 135 NPC_LT_LH_TU_UDP, 136 NPC_LT_LH_TU_ICMP, 137 NPC_LT_LH_TU_SCTP, 138 NPC_LT_LH_TU_ICMP6, 139 NPC_LT_LH_TU_IGMP = 8, 140 NPC_LT_LH_TU_ESP, 141 NPC_LT_LH_TU_AH, 142 NPC_LT_LH_CUSTOM0 = 0xE, 143 NPC_LT_LH_CUSTOM1 = 0xF, 144 }; 145 146 /* NPC port kind defines how the incoming or outgoing packets 147 * are processed. NPC accepts packets from up to 64 pkinds. 148 * Software assigns pkind for each incoming port such as CGX 149 * Ethernet interfaces, LBK interfaces, etc. 150 */ 151 #define NPC_UNRESERVED_PKIND_COUNT NPC_RX_CUSTOM_PRE_L2_PKIND 152 153 enum npc_pkind_type { 154 NPC_RX_LBK_PKIND = 0ULL, 155 NPC_RX_CUSTOM_PRE_L2_PKIND = 55ULL, 156 NPC_RX_VLAN_EXDSA_PKIND = 56ULL, 157 NPC_RX_CHLEN24B_PKIND = 57ULL, 158 NPC_RX_CPT_HDR_PKIND, 159 NPC_RX_CHLEN90B_PKIND, 160 NPC_TX_HIGIG_PKIND, 161 NPC_RX_HIGIG_PKIND, 162 NPC_RX_EDSA_PKIND, 163 NPC_TX_DEF_PKIND, /* NIX-TX PKIND */ 164 }; 165 166 enum npc_interface_type { 167 NPC_INTF_MODE_DEF, 168 }; 169 170 /* list of known and supported fields in packet header and 171 * fields present in key structure. 172 */ 173 enum key_fields { 174 NPC_DMAC, 175 NPC_SMAC, 176 NPC_ETYPE, 177 NPC_VLAN_ETYPE_CTAG, /* 0x8100 */ 178 NPC_VLAN_ETYPE_STAG, /* 0x88A8 */ 179 NPC_OUTER_VID, 180 NPC_TOS, 181 NPC_SIP_IPV4, 182 NPC_DIP_IPV4, 183 NPC_SIP_IPV6, 184 NPC_DIP_IPV6, 185 NPC_IPPROTO_TCP, 186 NPC_IPPROTO_UDP, 187 NPC_IPPROTO_SCTP, 188 NPC_IPPROTO_AH, 189 NPC_IPPROTO_ESP, 190 NPC_IPPROTO_ICMP, 191 NPC_IPPROTO_ICMP6, 192 NPC_SPORT_TCP, 193 NPC_DPORT_TCP, 194 NPC_SPORT_UDP, 195 NPC_DPORT_UDP, 196 NPC_SPORT_SCTP, 197 NPC_DPORT_SCTP, 198 NPC_HEADER_FIELDS_MAX, 199 NPC_CHAN = NPC_HEADER_FIELDS_MAX, /* Valid when Rx */ 200 NPC_PF_FUNC, /* Valid when Tx */ 201 NPC_ERRLEV, 202 NPC_ERRCODE, 203 NPC_LXMB, 204 NPC_LA, 205 NPC_LB, 206 NPC_LC, 207 NPC_LD, 208 NPC_LE, 209 NPC_LF, 210 NPC_LG, 211 NPC_LH, 212 /* Ethertype for untagged frame */ 213 NPC_ETYPE_ETHER, 214 /* Ethertype for single tagged frame */ 215 NPC_ETYPE_TAG1, 216 /* Ethertype for double tagged frame */ 217 NPC_ETYPE_TAG2, 218 /* outer vlan tci for single tagged frame */ 219 NPC_VLAN_TAG1, 220 /* outer vlan tci for double tagged frame */ 221 NPC_VLAN_TAG2, 222 /* other header fields programmed to extract but not of our interest */ 223 NPC_UNKNOWN, 224 NPC_KEY_FIELDS_MAX, 225 }; 226 227 struct npc_kpu_profile_cam { 228 u8 state; 229 u8 state_mask; 230 u16 dp0; 231 u16 dp0_mask; 232 u16 dp1; 233 u16 dp1_mask; 234 u16 dp2; 235 u16 dp2_mask; 236 } __packed; 237 238 struct npc_kpu_profile_action { 239 u8 errlev; 240 u8 errcode; 241 u8 dp0_offset; 242 u8 dp1_offset; 243 u8 dp2_offset; 244 u8 bypass_count; 245 u8 parse_done; 246 u8 next_state; 247 u8 ptr_advance; 248 u8 cap_ena; 249 u8 lid; 250 u8 ltype; 251 u8 flags; 252 u8 offset; 253 u8 mask; 254 u8 right; 255 u8 shift; 256 } __packed; 257 258 struct npc_kpu_profile { 259 int cam_entries; 260 int action_entries; 261 struct npc_kpu_profile_cam *cam; 262 struct npc_kpu_profile_action *action; 263 }; 264 265 /* NPC KPU register formats */ 266 struct npc_kpu_cam { 267 #if defined(__BIG_ENDIAN_BITFIELD) 268 u64 rsvd_63_56 : 8; 269 u64 state : 8; 270 u64 dp2_data : 16; 271 u64 dp1_data : 16; 272 u64 dp0_data : 16; 273 #else 274 u64 dp0_data : 16; 275 u64 dp1_data : 16; 276 u64 dp2_data : 16; 277 u64 state : 8; 278 u64 rsvd_63_56 : 8; 279 #endif 280 }; 281 282 struct npc_kpu_action0 { 283 #if defined(__BIG_ENDIAN_BITFIELD) 284 u64 rsvd_63_57 : 7; 285 u64 byp_count : 3; 286 u64 capture_ena : 1; 287 u64 parse_done : 1; 288 u64 next_state : 8; 289 u64 rsvd_43 : 1; 290 u64 capture_lid : 3; 291 u64 capture_ltype : 4; 292 u64 capture_flags : 8; 293 u64 ptr_advance : 8; 294 u64 var_len_offset : 8; 295 u64 var_len_mask : 8; 296 u64 var_len_right : 1; 297 u64 var_len_shift : 3; 298 #else 299 u64 var_len_shift : 3; 300 u64 var_len_right : 1; 301 u64 var_len_mask : 8; 302 u64 var_len_offset : 8; 303 u64 ptr_advance : 8; 304 u64 capture_flags : 8; 305 u64 capture_ltype : 4; 306 u64 capture_lid : 3; 307 u64 rsvd_43 : 1; 308 u64 next_state : 8; 309 u64 parse_done : 1; 310 u64 capture_ena : 1; 311 u64 byp_count : 3; 312 u64 rsvd_63_57 : 7; 313 #endif 314 }; 315 316 struct npc_kpu_action1 { 317 #if defined(__BIG_ENDIAN_BITFIELD) 318 u64 rsvd_63_36 : 28; 319 u64 errlev : 4; 320 u64 errcode : 8; 321 u64 dp2_offset : 8; 322 u64 dp1_offset : 8; 323 u64 dp0_offset : 8; 324 #else 325 u64 dp0_offset : 8; 326 u64 dp1_offset : 8; 327 u64 dp2_offset : 8; 328 u64 errcode : 8; 329 u64 errlev : 4; 330 u64 rsvd_63_36 : 28; 331 #endif 332 }; 333 334 struct npc_kpu_pkind_cpi_def { 335 #if defined(__BIG_ENDIAN_BITFIELD) 336 u64 ena : 1; 337 u64 rsvd_62_59 : 4; 338 u64 lid : 3; 339 u64 ltype_match : 4; 340 u64 ltype_mask : 4; 341 u64 flags_match : 8; 342 u64 flags_mask : 8; 343 u64 add_offset : 8; 344 u64 add_mask : 8; 345 u64 rsvd_15 : 1; 346 u64 add_shift : 3; 347 u64 rsvd_11_10 : 2; 348 u64 cpi_base : 10; 349 #else 350 u64 cpi_base : 10; 351 u64 rsvd_11_10 : 2; 352 u64 add_shift : 3; 353 u64 rsvd_15 : 1; 354 u64 add_mask : 8; 355 u64 add_offset : 8; 356 u64 flags_mask : 8; 357 u64 flags_match : 8; 358 u64 ltype_mask : 4; 359 u64 ltype_match : 4; 360 u64 lid : 3; 361 u64 rsvd_62_59 : 4; 362 u64 ena : 1; 363 #endif 364 }; 365 366 struct nix_rx_action { 367 #if defined(__BIG_ENDIAN_BITFIELD) 368 u64 rsvd_63_61 :3; 369 u64 flow_key_alg :5; 370 u64 match_id :16; 371 u64 index :20; 372 u64 pf_func :16; 373 u64 op :4; 374 #else 375 u64 op :4; 376 u64 pf_func :16; 377 u64 index :20; 378 u64 match_id :16; 379 u64 flow_key_alg :5; 380 u64 rsvd_63_61 :3; 381 #endif 382 }; 383 384 /* NPC_AF_INTFX_KEX_CFG field masks */ 385 #define NPC_PARSE_NIBBLE GENMASK_ULL(30, 0) 386 387 /* NPC_PARSE_KEX_S nibble definitions for each field */ 388 #define NPC_PARSE_NIBBLE_CHAN GENMASK_ULL(2, 0) 389 #define NPC_PARSE_NIBBLE_ERRLEV BIT_ULL(3) 390 #define NPC_PARSE_NIBBLE_ERRCODE GENMASK_ULL(5, 4) 391 #define NPC_PARSE_NIBBLE_L2L3_BCAST BIT_ULL(6) 392 #define NPC_PARSE_NIBBLE_LA_FLAGS GENMASK_ULL(8, 7) 393 #define NPC_PARSE_NIBBLE_LA_LTYPE BIT_ULL(9) 394 #define NPC_PARSE_NIBBLE_LB_FLAGS GENMASK_ULL(11, 10) 395 #define NPC_PARSE_NIBBLE_LB_LTYPE BIT_ULL(12) 396 #define NPC_PARSE_NIBBLE_LC_FLAGS GENMASK_ULL(14, 13) 397 #define NPC_PARSE_NIBBLE_LC_LTYPE BIT_ULL(15) 398 #define NPC_PARSE_NIBBLE_LD_FLAGS GENMASK_ULL(17, 16) 399 #define NPC_PARSE_NIBBLE_LD_LTYPE BIT_ULL(18) 400 #define NPC_PARSE_NIBBLE_LE_FLAGS GENMASK_ULL(20, 19) 401 #define NPC_PARSE_NIBBLE_LE_LTYPE BIT_ULL(21) 402 #define NPC_PARSE_NIBBLE_LF_FLAGS GENMASK_ULL(23, 22) 403 #define NPC_PARSE_NIBBLE_LF_LTYPE BIT_ULL(24) 404 #define NPC_PARSE_NIBBLE_LG_FLAGS GENMASK_ULL(26, 25) 405 #define NPC_PARSE_NIBBLE_LG_LTYPE BIT_ULL(27) 406 #define NPC_PARSE_NIBBLE_LH_FLAGS GENMASK_ULL(29, 28) 407 #define NPC_PARSE_NIBBLE_LH_LTYPE BIT_ULL(30) 408 409 struct nix_tx_action { 410 #if defined(__BIG_ENDIAN_BITFIELD) 411 u64 rsvd_63_48 :16; 412 u64 match_id :16; 413 u64 index :20; 414 u64 rsvd_11_8 :8; 415 u64 op :4; 416 #else 417 u64 op :4; 418 u64 rsvd_11_8 :8; 419 u64 index :20; 420 u64 match_id :16; 421 u64 rsvd_63_48 :16; 422 #endif 423 }; 424 425 /* NIX Receive Vtag Action Structure */ 426 #define RX_VTAG0_VALID_BIT BIT_ULL(15) 427 #define RX_VTAG0_TYPE_MASK GENMASK_ULL(14, 12) 428 #define RX_VTAG0_LID_MASK GENMASK_ULL(10, 8) 429 #define RX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0) 430 #define RX_VTAG1_VALID_BIT BIT_ULL(47) 431 #define RX_VTAG1_TYPE_MASK GENMASK_ULL(46, 44) 432 #define RX_VTAG1_LID_MASK GENMASK_ULL(42, 40) 433 #define RX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32) 434 435 /* NIX Transmit Vtag Action Structure */ 436 #define TX_VTAG0_DEF_MASK GENMASK_ULL(25, 16) 437 #define TX_VTAG0_OP_MASK GENMASK_ULL(13, 12) 438 #define TX_VTAG0_LID_MASK GENMASK_ULL(10, 8) 439 #define TX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0) 440 #define TX_VTAG1_DEF_MASK GENMASK_ULL(57, 48) 441 #define TX_VTAG1_OP_MASK GENMASK_ULL(45, 44) 442 #define TX_VTAG1_LID_MASK GENMASK_ULL(42, 40) 443 #define TX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32) 444 445 /* NPC MCAM reserved entry index per nixlf */ 446 #define NIXLF_UCAST_ENTRY 0 447 #define NIXLF_BCAST_ENTRY 1 448 #define NIXLF_ALLMULTI_ENTRY 2 449 #define NIXLF_PROMISC_ENTRY 3 450 451 struct npc_coalesced_kpu_prfl { 452 #define NPC_SIGN 0x00666f727063706e 453 #define NPC_PRFL_NAME "npc_prfls_array" 454 #define NPC_NAME_LEN 32 455 __le64 signature; /* "npcprof\0" (8 bytes/ASCII characters) */ 456 u8 name[NPC_NAME_LEN]; /* KPU Profile name */ 457 u64 version; /* KPU firmware/profile version */ 458 u8 num_prfl; /* No of NPC profiles. */ 459 u16 prfl_sz[0]; 460 }; 461 462 struct npc_mcam_kex { 463 /* MKEX Profle Header */ 464 u64 mkex_sign; /* "mcam-kex-profile" (8 bytes/ASCII characters) */ 465 u8 name[MKEX_NAME_LEN]; /* MKEX Profile name */ 466 u64 cpu_model; /* Format as profiled by CPU hardware */ 467 u64 kpu_version; /* KPU firmware/profile version */ 468 u64 reserved; /* Reserved for extension */ 469 470 /* MKEX Profle Data */ 471 u64 keyx_cfg[NPC_MAX_INTF]; /* NPC_AF_INTF(0..1)_KEX_CFG */ 472 /* NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG */ 473 u64 kex_ld_flags[NPC_MAX_LD]; 474 /* NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG */ 475 u64 intf_lid_lt_ld[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT][NPC_MAX_LD]; 476 /* NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG */ 477 u64 intf_ld_flags[NPC_MAX_INTF][NPC_MAX_LD][NPC_MAX_LFL]; 478 } __packed; 479 480 struct npc_kpu_fwdata { 481 int entries; 482 /* What follows is: 483 * struct npc_kpu_profile_cam[entries]; 484 * struct npc_kpu_profile_action[entries]; 485 */ 486 u8 data[0]; 487 } __packed; 488 489 struct npc_lt_def { 490 u8 ltype_mask; 491 u8 ltype_match; 492 u8 lid; 493 } __packed; 494 495 struct npc_lt_def_ipsec { 496 u8 ltype_mask; 497 u8 ltype_match; 498 u8 lid; 499 u8 spi_offset; 500 u8 spi_nz; 501 } __packed; 502 503 struct npc_lt_def_apad { 504 u8 ltype_mask; 505 u8 ltype_match; 506 u8 lid; 507 u8 valid; 508 } __packed; 509 510 struct npc_lt_def_color { 511 u8 ltype_mask; 512 u8 ltype_match; 513 u8 lid; 514 u8 noffset; 515 u8 offset; 516 } __packed; 517 518 struct npc_lt_def_et { 519 u8 ltype_mask; 520 u8 ltype_match; 521 u8 lid; 522 u8 valid; 523 u8 offset; 524 } __packed; 525 526 struct npc_lt_def_cfg { 527 struct npc_lt_def rx_ol2; 528 struct npc_lt_def rx_oip4; 529 struct npc_lt_def rx_iip4; 530 struct npc_lt_def rx_oip6; 531 struct npc_lt_def rx_iip6; 532 struct npc_lt_def rx_otcp; 533 struct npc_lt_def rx_itcp; 534 struct npc_lt_def rx_oudp; 535 struct npc_lt_def rx_iudp; 536 struct npc_lt_def rx_osctp; 537 struct npc_lt_def rx_isctp; 538 struct npc_lt_def_ipsec rx_ipsec[2]; 539 struct npc_lt_def pck_ol2; 540 struct npc_lt_def pck_oip4; 541 struct npc_lt_def pck_oip6; 542 struct npc_lt_def pck_iip4; 543 struct npc_lt_def_apad rx_apad0; 544 struct npc_lt_def_apad rx_apad1; 545 struct npc_lt_def_color ovlan; 546 struct npc_lt_def_color ivlan; 547 struct npc_lt_def_color rx_gen0_color; 548 struct npc_lt_def_color rx_gen1_color; 549 struct npc_lt_def_et rx_et[2]; 550 } __packed; 551 552 /* Loadable KPU profile firmware data */ 553 struct npc_kpu_profile_fwdata { 554 #define KPU_SIGN 0x00666f727075706b 555 #define KPU_NAME_LEN 32 556 /** Maximum number of custom KPU entries supported by the built-in profile. */ 557 #define KPU_MAX_CST_ENT 2 558 /* KPU Profle Header */ 559 __le64 signature; /* "kpuprof\0" (8 bytes/ASCII characters) */ 560 u8 name[KPU_NAME_LEN]; /* KPU Profile name */ 561 __le64 version; /* KPU profile version */ 562 u8 kpus; 563 u8 reserved[7]; 564 565 /* Default MKEX profile to be used with this KPU profile. May be 566 * overridden with mkex_profile module parameter. Format is same as for 567 * the MKEX profile to streamline processing. 568 */ 569 struct npc_mcam_kex mkex; 570 /* LTYPE values for specific HW offloaded protocols. */ 571 struct npc_lt_def_cfg lt_def; 572 /* Dynamically sized data: 573 * Custom KPU CAM and ACTION configuration entries. 574 * struct npc_kpu_fwdata kpu[kpus]; 575 */ 576 u8 data[0]; 577 } __packed; 578 579 struct rvu_npc_mcam_rule { 580 struct flow_msg packet; 581 struct flow_msg mask; 582 u8 intf; 583 union { 584 struct nix_tx_action tx_action; 585 struct nix_rx_action rx_action; 586 }; 587 u64 vtag_action; 588 struct list_head list; 589 u64 features; 590 u16 owner; 591 u16 entry; 592 u16 cntr; 593 bool has_cntr; 594 u8 default_rule; 595 bool enable; 596 bool vfvlan_cfg; 597 }; 598 599 #endif /* NPC_H */ 600