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Searched refs:NUM_DSPCLK_LEVELS (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/pm/inc/
Dsmu10_driver_if.h29 #define NUM_DSPCLK_LEVELS 8 macro
Dsmu9_driver_if.h110 #define NUM_DSPCLK_LEVELS 8 macro
195 DisplayClockTable_t DisplayClockTable[DSPCLK_COUNT][NUM_DSPCLK_LEVELS];
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega10_processpptables.c35 #define NUM_DSPCLK_LEVELS 8 macro
753 num_entries = clk_dep_table->ucNumEntries + 1 > NUM_DSPCLK_LEVELS ? in get_dcefclk_voltage_dependency_table()
754 NUM_DSPCLK_LEVELS : clk_dep_table->ucNumEntries + 1; in get_dcefclk_voltage_dependency_table()
Dvega10_hwmgr.c1943 PP_ASSERT_WITH_CODE(dep_table->count <= NUM_DSPCLK_LEVELS, in vega10_populate_single_display_type()
1958 while (i < NUM_DSPCLK_LEVELS) { in vega10_populate_single_display_type()