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Searched refs:PA_SC_VPORT_SCISSOR_7_BR__BR_X_MASK (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h6738 #define PA_SC_VPORT_SCISSOR_7_BR__BR_X_MASK 0x00007fffL macro
Dgfx_7_2_sh_mask.h6447 #define PA_SC_VPORT_SCISSOR_7_BR__BR_X_MASK 0x7fff macro
Dgfx_8_0_sh_mask.h7235 #define PA_SC_VPORT_SCISSOR_7_BR__BR_X_MASK 0x7fff macro
Dgfx_8_1_sh_mask.h7771 #define PA_SC_VPORT_SCISSOR_7_BR__BR_X_MASK 0x7fff macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h14834 #define PA_SC_VPORT_SCISSOR_7_BR__BR_X_MASK … macro
Dgc_9_1_sh_mask.h16141 #define PA_SC_VPORT_SCISSOR_7_BR__BR_X_MASK … macro
Dgc_9_2_1_sh_mask.h16003 #define PA_SC_VPORT_SCISSOR_7_BR__BR_X_MASK … macro
Dgc_9_4_2_sh_mask.h8252 #define PA_SC_VPORT_SCISSOR_7_BR__BR_X_MASK … macro
Dgc_10_1_0_sh_mask.h22156 #define PA_SC_VPORT_SCISSOR_7_BR__BR_X_MASK … macro
Dgc_10_3_0_sh_mask.h20348 #define PA_SC_VPORT_SCISSOR_7_BR__BR_X_MASK … macro