Searched refs:PSB_RVDC32 (Results 1 – 6 of 6) sorted by relevance
185 regs->psb.saveDSPARB = PSB_RVDC32(DSPARB); in oaktrail_save_display_registers()186 regs->psb.saveDSPFW1 = PSB_RVDC32(DSPFW1); in oaktrail_save_display_registers()187 regs->psb.saveDSPFW2 = PSB_RVDC32(DSPFW2); in oaktrail_save_display_registers()188 regs->psb.saveDSPFW3 = PSB_RVDC32(DSPFW3); in oaktrail_save_display_registers()189 regs->psb.saveDSPFW4 = PSB_RVDC32(DSPFW4); in oaktrail_save_display_registers()190 regs->psb.saveDSPFW5 = PSB_RVDC32(DSPFW5); in oaktrail_save_display_registers()191 regs->psb.saveDSPFW6 = PSB_RVDC32(DSPFW6); in oaktrail_save_display_registers()192 regs->psb.saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT); in oaktrail_save_display_registers()195 p->conf = PSB_RVDC32(PIPEACONF); in oaktrail_save_display_registers()196 p->src = PSB_RVDC32(PIPEASRC); in oaktrail_save_display_registers()[all …]
745 hdmi_dev->saveDPLL_CTRL = PSB_RVDC32(DPLL_CTRL); in oaktrail_hdmi_save()746 hdmi_dev->saveDPLL_DIV_CTRL = PSB_RVDC32(DPLL_DIV_CTRL); in oaktrail_hdmi_save()747 hdmi_dev->saveDPLL_ADJUST = PSB_RVDC32(DPLL_ADJUST); in oaktrail_hdmi_save()748 hdmi_dev->saveDPLL_UPDATE = PSB_RVDC32(DPLL_UPDATE); in oaktrail_hdmi_save()749 hdmi_dev->saveDPLL_CLK_ENABLE = PSB_RVDC32(DPLL_CLK_ENABLE); in oaktrail_hdmi_save()752 pipeb->conf = PSB_RVDC32(PIPEBCONF); in oaktrail_hdmi_save()753 pipeb->src = PSB_RVDC32(PIPEBSRC); in oaktrail_hdmi_save()754 pipeb->htotal = PSB_RVDC32(HTOTAL_B); in oaktrail_hdmi_save()755 pipeb->hblank = PSB_RVDC32(HBLANK_B); in oaktrail_hdmi_save()756 pipeb->hsync = PSB_RVDC32(HSYNC_B); in oaktrail_hdmi_save()[all …]
80 u32 writeVal = PSB_RVDC32(reg); in psb_enable_pipestat()83 (void) PSB_RVDC32(reg); in psb_enable_pipestat()96 u32 writeVal = PSB_RVDC32(reg); in psb_disable_pipestat()99 (void) PSB_RVDC32(reg); in psb_disable_pipestat()122 pipe_stat_val = PSB_RVDC32(pipe_stat_reg); in mid_pipe_event_handler()131 PSB_WVDC32(PSB_RVDC32(pipe_stat_reg), pipe_stat_reg); in mid_pipe_event_handler()132 pipe_clear = PSB_RVDC32(pipe_stat_reg) & pipe_status; in mid_pipe_event_handler()141 __func__, pipe, PSB_RVDC32(pipe_stat_reg)); in mid_pipe_event_handler()236 vdc_stat = PSB_RVDC32(PSB_INT_IDENTITY_R); in psb_irq_handler()269 (void) PSB_RVDC32(PSB_INT_IDENTITY_R); in psb_irq_handler()[all …]
176 regs->saveDSPARB = PSB_RVDC32(DSPARB); in psb_save_display_registers()177 regs->saveDSPFW1 = PSB_RVDC32(DSPFW1); in psb_save_display_registers()178 regs->saveDSPFW2 = PSB_RVDC32(DSPFW2); in psb_save_display_registers()179 regs->saveDSPFW3 = PSB_RVDC32(DSPFW3); in psb_save_display_registers()180 regs->saveDSPFW4 = PSB_RVDC32(DSPFW4); in psb_save_display_registers()181 regs->saveDSPFW5 = PSB_RVDC32(DSPFW5); in psb_save_display_registers()182 regs->saveDSPFW6 = PSB_RVDC32(DSPFW6); in psb_save_display_registers()183 regs->saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT); in psb_save_display_registers()
342 (void) PSB_RVDC32(PSB_PGETBL_CTL); in psb_gtt_takedown()374 dev_priv->pge_ctl = PSB_RVDC32(PSB_PGETBL_CTL); in psb_gtt_init()376 (void) PSB_RVDC32(PSB_PGETBL_CTL); in psb_gtt_init()
808 #define PSB_RVDC32(_offs) ioread32(dev_priv->vdc_reg + (_offs)) macro