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Searched refs:REG_OFDM0_XA_AGC_CORE1 (Results 1 – 4 of 4) sorted by relevance

/drivers/net/wireless/realtek/rtl8xxxu/
Drtl8xxxu_8192e.c1081 u8 xa_agc = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1) & 0xff; in rtl8192eu_phy_iqcalibrate()
1220 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8192eu_phy_iqcalibrate()
1222 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | 0x50); in rtl8192eu_phy_iqcalibrate()
1223 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | xa_agc); in rtl8192eu_phy_iqcalibrate()
Drtl8xxxu_8723b.c905 u8 xa_agc = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1) & 0xff; in rtl8723bu_phy_iqcalibrate()
1066 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8723bu_phy_iqcalibrate()
1068 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | 0x50); in rtl8723bu_phy_iqcalibrate()
1069 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | xa_agc); in rtl8723bu_phy_iqcalibrate()
Drtl8xxxu_regs.h974 #define REG_OFDM0_XA_AGC_CORE1 0x0c50 macro
Drtl8xxxu_core.c6443 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, 0x6954341e); in rtl8xxxu_start()