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Searched refs:REG_SET_7 (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_dpp_dscl.c228 REG_SET_7(LB_DATA_FORMAT, 0, in dpp1_dscl_set_lb()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dsc.c591 REG_SET_7(DSCC_PPS_CONFIG1, 0, in dsc_write_to_registers()
/drivers/gpu/drm/amd/display/dc/dce/
Ddce_stream_encoder.c902 REG_SET_7(DP_SEC_CNTL, 0, in dce110_stream_encoder_stop_dp_info_packets()
/drivers/gpu/drm/amd/display/dc/inc/
Dreg_helper.h104 #define REG_SET_7(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ macro
/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubp.c159 REG_SET_7(DCHUBP_REQ_SIZE_CONFIG_C, 0, in hubp21_program_requestor()