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Searched refs:RR (Results 1 – 14 of 14) sorted by relevance

/drivers/video/fbdev/omap2/omapfb/dss/
Ddispc.c284 #define RR(reg) \ macro
405 RR(CONFIG); in dispc_restore_context()
406 RR(LINE_NUMBER); in dispc_restore_context()
409 RR(GLOBAL_ALPHA); in dispc_restore_context()
411 RR(CONFIG2); in dispc_restore_context()
413 RR(CONFIG3); in dispc_restore_context()
416 RR(DEFAULT_COLOR(i)); in dispc_restore_context()
417 RR(TRANS_COLOR(i)); in dispc_restore_context()
418 RR(SIZE_MGR(i)); in dispc_restore_context()
421 RR(TIMING_H(i)); in dispc_restore_context()
[all …]
Ddss.c125 #define RR(reg) \ macro
152 RR(CONTROL); in dss_restore_context()
156 RR(SDI_CONTROL); in dss_restore_context()
157 RR(PLL_CONTROL); in dss_restore_context()
164 #undef RR
/drivers/gpu/drm/omapdrm/dss/
Ddispc.c415 #define RR(dispc, reg) \ macro
536 RR(dispc, CONFIG); in dispc_restore_context()
537 RR(dispc, LINE_NUMBER); in dispc_restore_context()
540 RR(dispc, GLOBAL_ALPHA); in dispc_restore_context()
542 RR(dispc, CONFIG2); in dispc_restore_context()
544 RR(dispc, CONFIG3); in dispc_restore_context()
547 RR(dispc, DEFAULT_COLOR(i)); in dispc_restore_context()
548 RR(dispc, TRANS_COLOR(i)); in dispc_restore_context()
549 RR(dispc, SIZE_MGR(i)); in dispc_restore_context()
552 RR(dispc, TIMING_H(i)); in dispc_restore_context()
[all …]
Ddss.c107 #define RR(dss, reg) \ macro
133 RR(dss, CONTROL); in dss_restore_context()
136 RR(dss, SDI_CONTROL); in dss_restore_context()
137 RR(dss, PLL_CONTROL); in dss_restore_context()
144 #undef RR
/drivers/block/paride/
Depat.c201 #define RR(r) (epat_read_regr(pi,2,r)) macro
257 cc = RR(0xd); in epat_test_proto()
298 ver = RR(0xb); in epat_log_adapter()
Depia.c105 #define RR(r) (epia_read_regr(pi,0,r)) macro
248 if (RR(2) != (k^0xaa)) e[j]++; in epia_test_proto()
Dbpck.c106 #define RR(r) (bpck_read_regr(pi,2,r)) macro
377 f = RR(0); in bpck_read_eeprom()
/drivers/isdn/mISDN/
Dlayer2.h96 #define RR 0x01 macro
Dlayer2.c457 return data[0] == RR; in IsRR()
1128 enquiry_cr(l2, RR, RSP, 1); in enquiry_response()
1138 enquiry_cr(l2, RR, CMD, 1); in transmit_enquiry()
1187 int PollFlag, rsp, typ = RR; in l2_st7_got_super()
1226 } else if ((nr == l2->vs) && (typ == RR)) { in l2_st7_got_super()
1233 if (typ != RR) in l2_st7_got_super()
1237 if (skb_queue_len(&l2->i_queue) && (typ == RR)) in l2_st7_got_super()
1340 enquiry_cr(l2, RR, RSP, 0); in l2_got_iframe()
1734 enquiry_cr(l2, RR, RSP, 0); in l2_clear_own_busy()
/drivers/gpu/drm/amd/display/dc/inc/hw/
Dhw_shared.h346 uint32_t RR:1; member
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_afmt.c98 cea_channels.channels.RR = speaker_flags.RL_RR; in speakers_to_channels()
/drivers/gpu/drm/amd/display/dc/dce/
Ddce_stream_encoder.c1150 cea_channels.channels.RR = speaker_flags.RL_RR; in speakers_to_channels()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_stream_encoder.c1119 cea_channels.channels.RR = speaker_flags.RL_RR; in speakers_to_channels()
/drivers/tty/
Dn_gsm.c294 #define RR 0x01 macro
600 case RR: in gsm_print_packet()