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Searched refs:RTC (Results 1 – 23 of 23) sorted by relevance

/drivers/rtc/
DKconfig3 # RTC class/drivers configuration
19 Generic RTC class support. If you say yes here, you will
26 bool "Set system time from RTC on startup and resume"
30 the value read from a specified RTC device. This is useful to avoid
34 string "RTC used to set the system time"
38 The RTC device that will be used to (re)initialize the system
50 sleep states. Do not specify an RTC here unless it stays powered
54 bool "Set the RTC time based on NTP synchronization"
58 in the RTC specified by RTC_HCTOSYS_DEVICE approximately every 11
62 string "RTC used to synchronize NTP adjustment"
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Drtc-cmos.c971 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. in cmos_do_probe()
/drivers/cpuidle/
Dcpuidle-ux500.c112 prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) | in dbx500_cpuidle_probe()
/drivers/mfd/
DKconfig90 controllers, 11 LDOs, RTC, automatic battery, temperature and
180 components like codecs or RTC under the corresponding menus.
223 as RTC, USBPD, etc. but you have to select the individual drivers.
508 functions, such as regulators, RTC, codec, Coulomb counter, etc.
522 multi-functions, such as regulators, RTC, codec, Coulomb counter,
758 select individual components like voltage regulators, RTC and
781 select individual components like voltage regulators, RTC and
809 RTC, regulators, clock generator, watchdog etc. This driver
838 MAX77802 which are Power Management IC with an RTC on chip.
900 This is a Power Management IC with RTC, Flash, Fuel Gauge, Haptic,
[all …]
Dlp8788.c110 MFD_DEV_WITH_RESOURCE(RTC, rtc_irqs, ARRAY_SIZE(rtc_irqs)),
Ddb8500-prcmu.c308 IRQ_ENTRY(RTC),
336 WAKEUP_ENTRY(RTC),
/drivers/acpi/
DKconfig238 Time Clock (RTC). Its wake timers allow the system to transition from
240 elapses. In comparison with the RTC Alarm, the TAD provides a larger
/drivers/clk/nxp/
Dclk-lpc32xx.c201 LPC32XX_CLK_DEFINE(RTC, "rtc", 0x0, LPC32XX_CLK_XTAL_32K),
1222 LPC32XX_DEFINE_FIXED(RTC, 32768),
/drivers/clocksource/
DKconfig283 This enables 2 different 64-bit timers: RTC (for UP) and GFRC (for SMP).
284 RTC is implemented inside the core, while GFRC sits outside the core in
/drivers/power/reset/
DKconfig174 controlling a tiny circuit BBPU inside MT6323 RTC.
/drivers/macintosh/
DKconfig68 RAM and the RTC (real time clock) chip. Say Y to enable support for
/drivers/media/dvb-frontends/
Dstv0900_sw.c472 stv0900_write_reg(intp, RTC, 0x80); in stv0900_check_timing_lock()
492 stv0900_write_reg(intp, RTC, 0x88); in stv0900_check_timing_lock()
Dstv090x.c1519 if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) in stv090x_start_search()
2078 if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0) in stv090x_chk_tmg()
2108 if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */ in stv090x_chk_tmg()
Dstv0900_reg.h2505 #define RTC REGx(R0900_P1_RTC) macro
Dstv0900_core.c1034 stv0900_write_reg(intp, RTC, 0x88); in stv0900_start_search()
/drivers/zorro/
Dzorro.ids345 2000 A1200 T68030 RTC [Accelerator]
/drivers/clk/
Dclk-stm32mp1.c2027 COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE,
2091 RTC,
/drivers/char/
DKconfig392 tristate "UV_MMTIMER Memory mapped RTC for SGI UV"
/drivers/misc/
DKconfig254 to maintain PMIC register and RTC state in the absence of
/drivers/spi/
DKconfig425 tristate "ICP DAS LP-8841 SPI Controller for RTC"
/drivers/net/ethernet/amd/xgbe/
Dxgbe-dev.c248 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RTC, val); in xgbe_config_rx_threshold()
/drivers/scsi/
DKconfig1391 host's ID is taken from the setting in TT RTC NVRAM.
/drivers/watchdog/
DKconfig658 the RTC for the STMP37XX/378X or i.MX23/28 SoC.