Home
last modified time | relevance | path

Searched refs:SPI_WCL_PIPE_PERCENT_CS1__VALUE_MASK (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h8841 #define SPI_WCL_PIPE_PERCENT_CS1__VALUE_MASK 0x1f macro
Dgfx_8_0_sh_mask.h10459 #define SPI_WCL_PIPE_PERCENT_CS1__VALUE_MASK 0x7f macro
Dgfx_8_1_sh_mask.h10857 #define SPI_WCL_PIPE_PERCENT_CS1__VALUE_MASK 0x7f macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h12299 #define SPI_WCL_PIPE_PERCENT_CS1__VALUE_MASK … macro
Dgc_9_1_sh_mask.h13683 #define SPI_WCL_PIPE_PERCENT_CS1__VALUE_MASK … macro
Dgc_9_2_1_sh_mask.h13479 #define SPI_WCL_PIPE_PERCENT_CS1__VALUE_MASK … macro
Dgc_9_4_2_sh_mask.h24913 #define SPI_WCL_PIPE_PERCENT_CS1__VALUE_MASK … macro
Dgc_10_1_0_sh_mask.h19630 #define SPI_WCL_PIPE_PERCENT_CS1__VALUE_MASK … macro
Dgc_10_3_0_sh_mask.h17991 #define SPI_WCL_PIPE_PERCENT_CS1__VALUE_MASK … macro