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Searched refs:SQ_CMD (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/amdkfd/
Dkfd_dbgdev.h64 #define SQ_CMD 0x8DEC macro
Dkfd_dbgdev.c661 packets_vec[1].bitfields2.reg_offset = SQ_CMD / 4 - AMD_CONFIG_REG_BASE; in dbgdev_wave_control_diq()
/drivers/gpu/drm/radeon/
Dcik_reg.h151 #define SQ_CMD 0x8DEC macro
/drivers/gpu/drm/amd/amdgpu/
Dgfx_v7_0.c4147 value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03); in gfx_v7_0_ring_soft_recovery()
4148 value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01); in gfx_v7_0_ring_soft_recovery()
4149 value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1); in gfx_v7_0_ring_soft_recovery()
4150 value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid); in gfx_v7_0_ring_soft_recovery()
Dgfx_v8_0.c6440 value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03); in gfx_v8_0_ring_soft_recovery()
6441 value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01); in gfx_v8_0_ring_soft_recovery()
6442 value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1); in gfx_v8_0_ring_soft_recovery()
6443 value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid); in gfx_v8_0_ring_soft_recovery()
Dgfx_v9_0.c5737 value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03); in gfx_v9_0_ring_soft_recovery()
5738 value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01); in gfx_v9_0_ring_soft_recovery()
5739 value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1); in gfx_v9_0_ring_soft_recovery()
5740 value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid); in gfx_v9_0_ring_soft_recovery()
Dgfx_v10_0.c9019 value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03); in gfx_v10_0_ring_soft_recovery()
9020 value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01); in gfx_v10_0_ring_soft_recovery()
9021 value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1); in gfx_v10_0_ring_soft_recovery()
9022 value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid); in gfx_v10_0_ring_soft_recovery()